SAM7X128_14 Datasheet, PDF (496/662 Pages) ATMEL Corporation – ARM-based Flash MCU

Figure 36-10. Possible Initialization Procedure
Enable CAN Controller Clock
(PMC)
Enable CAN Controller Interrupt Line
(AIC)
Configure a Mailbox in Reception Mode
Change CAN_BR value
(ABM == 1 and CANEN == 1)
Errors ?
Yes
(CAN_SR or CAN_MSRx)
No
ABM = 0 and CANEN = 0
CANEN = 1 (ABM == 0)
End of Initialization
36.7.2 CAN Controller Interrupt Handling
There are two different types of interrupts. One type of interrupt is a message-object related interrupt, the other is a
system interrupt that handles errors or system-related interrupt sources.
All interrupt sources can be masked by writing the corresponding field in the CAN_IDR register. They can be unmasked
by writing to the CAN_IER register. After a power-up reset, all interrupt sources are disabled (masked). The current mask
status can be checked by reading the CAN_IMR register.
The CAN_SR register gives all interrupt source states.
The following events may initiate one of the two interrupts:
 Message object interrupt
 Data registers in the mailbox object are available to the application. In Receive Mode, a new message was
received. In Transmit Mode, a message was transmitted successfully.
 A sent transmission was aborted.
 System interrupts
 Bus off interrupt: The CAN module enters the bus off state.
 Error passive interrupt: The CAN module enters Error Passive Mode.
 Error Active Mode: The CAN module is neither in Error Passive Mode nor in Bus Off mode.
 Warn Limit interrupt: The CAN module is in Error-active Mode, but at least one of its error counter value
exceeds 96.
 Wake-up interrupt: This interrupt is generated after a wake-up and a bus synchronization.
 Sleep interrupt: This interrupt is generated after a Low-power Mode enable once all pending messages in
transmission have been sent.
 Internal timer counter overflow interrupt: This interrupt is generated when the internal timer rolls over.
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
496