SAM7X128_14 Datasheet, PDF (21/662 Pages) ATMEL Corporation – ARM-based Flash MCU

8.5.3 Lock Regions
8.5.3.1 SAM7X512
Two Embedded Flash Controllers each manage 16 lock bits to protect 16 regions of the flash against inadvertent flash
erasing or programming commands. The SAM7X512 contains 32 lock regions and each lock region contains 64 pages of
256 bytes. Each lock region has a size of 16 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the EFC trigs an interrupt.
The 32 NVM bits are software programmable through both of the EFC User Interfaces. The command “Set Lock Bit”
enables the protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
8.5.3.2 SAM7X256
The Embedded Flash Controller manages 16 lock bits to protect 16 regions of the flash against inadvertent flash erasing
or programming commands. The SAM7X256 contains 16 lock regions and each lock region contains 64 pages of 256
bytes. Each lock region has a size of 16 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the EFC trigs an interrupt.
The 16 NVM bits are software programmable through the EFC User Interface. The command “Set Lock Bit” enables the
protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
8.5.3.3 SAM7X128
The Embedded Flash Controller manages 8 lock bits to protect 8 regions of the flash against inadvertent flash erasing or
programming commands. The SAM7X128 contains 8 lock regions and each lock region contains 64 pages of 256 bytes.
Each lock region has a size of 16 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the EFC trigs an interrupt.
The 8 NVM bits are software programmable through the EFC User Interface. The command “Set Lock Bit” enables the
protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
8.5.4
Security Bit Feature
The SAM7X512/256/128 features a security bit, based on a specific NVM-Bit. When the security is enabled, any access
to the Flash, either through the ICE interface or through the Fast Flash Programming Interface, is forbidden. This ensures
the confidentiality of the code programmed in the Flash.
This security bit can only be enabled, through the Command “Set Security Bit” of the EFC User Interface. Disabling the
security bit can only be achieved by asserting the ERASE pin at 1, and after a full flash erase is performed. When the
security bit is deactivated, all accesses to the flash are permitted.
It is important to note that the assertion of the ERASE pin should always be longer than 220 ms.
As the ERASE pin integrates a permanent pull-down, it can be left unconnected during normal operation. However, it is
safer to connect it directly to GND for the final application.
8.5.5
Non-volatile Brownout Detector Control
Two general purpose NVM (GPNVM) bits are used for controlling the brownout detector (BOD), so that even after a
power loss, the brownout detector operations remain in their state.
These two GPNVM bits can be cleared or set respectively through the commands “Clear General-purpose NVM Bit” and
“Set General-purpose NVM Bit” of the EFC User Interface.
 GPNVM Bit 0 is used as a brownout detector enable bit. Setting the GPNVM Bit 0 enables the BOD, clearing it
disables the BOD. Asserting ERASE clears the GPNVM Bit 0 and thus disables the brownout detector by default.
SAM7X Series [DATASHEET] 21
6120K–ATARM–11-Feb-14