SAM7X128_14 Datasheet, PDF (46/662 Pages) ATMEL Corporation – ARM-based Flash MCU

12.3.2 Test Environment
Figure 12-3 shows a test environment example. Test vectors are sent and interpreted by the tester. In this example, the
“board in test” is designed using a number of JTAG-compliant devices. These devices can be connected to form a single
scan chain.
Figure 12-3. Application Test Environment Example
Test Adaptor
Tester
JTAG
Interface
ICE/JTAG
Connector
Chip n
Chip 2
AT91SAM7Xxx
Chip 1
AT91SAM7Xxx-based Application Board In Test
12.4 Debug and Test Pin Description
Table 12-1.
Pin Name
NRST
TST
TCK
TDI
TDO
TMS
JTAGSEL
DRXD
DTXD
Debug and Test Pin List
Function
Reset/Test
Microcontroller Reset
Test Mode Select
ICE and JTAG
Test Clock
Test Data In
Test Data Out
Test Mode Select
JTAG Selection
Debug Unit
Debug Receive Data
Debug Transmit Data
Type
Active Level
Input/Output
Input
Low
High
Input
Input
Output
Input
Input
Input
Output
12.5 Functional Description
12.5.1 Test Pin
One dedicated pin, TST, is used to define the device operating mode. The user must make sure that this pin is tied at low
level to ensure normal operating conditions. Other values associated with this pin are reserved for manufacturing test.
SAM7X Series [DATASHEET] 46
6120K–ATARM–11-Feb-14