SAM7X128_14 Datasheet, PDF (123/662 Pages) ATMEL Corporation – ARM-based Flash MCU

Table 20-18. Signal Description List (Continued)
Signal Name
Function
TST
PGMEN0
PGMEN1
Test Mode Select
Test Mode Select
Test Mode Select
TCK
TDI
TDO
TMS
JTAG TCK
JTAG Test Data In
JTAG Test Data Out
JTAG Test Mode Select
Test
JTAG
Type
Input
Input
Input
Input
Input
Output
Input
Active
Level Comments
High
High
High
Must be connected to VDDIO.
Must be connected to VDDIO
Must be connected to VDDIO
-
Pulled-up input at reset
-
Pulled-up input at reset
-
-
Pulled-up input at reset
20.3.2 Entering Serial Programming Mode
The following algorithm puts the device in Serial Programming Mode:
 Apply GND, VDDIO, VDDCORE, VDDFLASH and VDDPLL.
 Apply XIN clock within T_{POR_RESET} + 32(T_SCLK) if an external clock is available.
 Wait for T_{POR_RESET}.
 Reset the TAP controller clocking 5 TCK pulses with TMS set.
 Shift 0x2 into the IR register (IR is 4 bits long, LSB first) without going through the Run-Test-Idle state.
 Shift 0x2 into the DR register (DR is 4 bits long, LSB first) without going through the Run-Test-Idle state.
 Shift 0xC into the IR register (IR is 4 bits long, LSB first) without going through the Run-Test-Idle state.
Note:
After reset, the device is clocked by the internal RC oscillator. Before clearing RDY signal, if an external clock ( >
32 kHz) is connected to XIN, then the device will switch on the external clock. Else, XIN input is not considered.
An higher frequency on XIN speeds up the programmer handshake.
Table 20-19. Reset TAP Controller and Go to Select-DR-Scan
TDI
TMS
TAP Controller State
X
1
X
1
X
1
X
1
X
1
Test-Logic Reset
X
0
Run-Test/Idle
Xt
1
Select-DR-Scan
20.3.3 Read/Write Handshake
The read/write handshake is done by carrying out read/write operations on two registers of the device that are accessible
through the JTAG:
 Debug Comms Control Register: DCCR
 Debug Comms Data Register: DCDR
Access to these registers is done through the TAP 38-bit DR register comprising a 32-bit data field, a 5-bit address field
and a read/write bit. The data to be written is scanned into the 32-bit data field with the address of the register to the 5-bit
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
123