SAM7X128_14 Datasheet, PDF (220/662 Pages) ATMEL Corporation – ARM-based Flash MCU

Figure 27-2. Application Block Diagram
Keyboard Driver
Control & Command
Driver
On-Chip Peripheral Drivers
On-Chip Peripherals
PIO Controller
Keyboard Driver
General Purpose I/Os
External Devices
27.3 Product Dependencies
27.3.1 Pin Multiplexing
Each pin is configurable, according to product definition as either a general-purpose I/O line only, or as an I/O line
multiplexed with one or two peripheral I/Os. As the multiplexing is hardware-defined and thus product-dependent, the
hardware designer and programmer must carefully determine the configuration of the PIO controllers required by their
application. When an I/O line is general-purpose only, i.e. not multiplexed with any peripheral I/O, programming of the
PIO Controller regarding the assignment to a peripheral has no effect and only the PIO Controller can control how the pin
is driven by the product.
27.3.2 External Interrupt Lines
The interrupt signals FIQ and IRQ0 to IRQn are most generally multiplexed through the PIO Controllers. However, it is
not necessary to assign the I/O line to the interrupt function as the PIO Controller has no effect on inputs and the interrupt
lines (FIQ or IRQs) are used only as inputs.
27.3.3 Power Management
The Power Management Controller controls the PIO Controller clock in order to save power. Writing any of the registers
of the user interface does not require the PIO Controller clock to be enabled. This means that the configuration of the I/O
lines does not require the PIO Controller clock to be enabled.
However, when the clock is disabled, not all of the features of the PIO Controller are available. Note that the Input
Change Interrupt and the read of the pin level require the clock to be validated.
After a hardware reset, the PIO clock is disabled by default.
The user must configure the Power Management Controller before any access to the input line information.
27.3.4 Interrupt Generation
For interrupt handling, the PIO Controllers are considered as user peripherals. This means that the PIO Controller
interrupt lines are connected among the interrupt sources 2 to 31. Refer to the PIO Controller peripheral identifier in the
product description to identify the interrupt sources dedicated to the PIO Controllers.
The PIO Controller interrupt can be generated only if the PIO Controller clock is enabled.
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
220