SAM7X128_14 Datasheet, PDF (20/662 Pages) ATMEL Corporation – ARM-based Flash MCU

Figure 8-3. Internal Memory Mapping with GPNVM Bit 2 = 1
0x0000 0000
0x000F FFFF
0x0010 0000
256M Bytes
0x001F FFFF
0x0020 0000
0x002F FFFF
0x0030 0000
0x003F FFFF
0x0040 0000
Flash Before Remap
SRAM After Remap
Internal FLASH
Internal SRAM
Internal ROM
Undefined Areas
(Abort)
0x0FFF FFFF
1 M Bytes
1 M Bytes
1 M Bytes
1 M Bytes
252 M Bytes
8.5 Embedded Flash
8.5.1
Flash Overview
 The Flash of the SAM7X512 is organized in two banks (dual plane) of 1024 pages of 256 bytes. The 524,288 bytes
are organized in 32-bit words.
 The Flash of the SAM7X256 is organized in 1024 pages of 256 bytes (single plane). It reads as 65,536 32-bit
words.
 The Flash of the SAM7X128 is organized in 512 pages of 256 bytes (single plane). It reads as 32,768 32-bit words.
The Flash contains a 256-byte write buffer, accessible through a 32-bit interface.
The Flash benefits from the integration of a power reset cell and from the brownout detector. This prevents code
corruption during power supply changes, even in the worst conditions.
When Flash is not used (read or write access), it is automatically placed into standby mode.
8.5.2
Embedded Flash Controller
The Embedded Flash Controller (EFC) manages accesses performed by the masters of the system. It enables reading
the Flash and writing the write buffer. It also contains a User Interface, mapped within the Memory Controller on the APB.
The User Interface allows:
 programming of the access parameters of the Flash (number of wait states, timings, etc.)
 starting commands such as full erase, page erase, page program, NVM bit set, NVM bit clear, etc.
 getting the end status of the last command
 getting error status
 programming interrupts on the end of the last commands or on errors
The Embedded Flash Controller also provides a dual 32-bit Prefetch Buffer that optimizes 16-bit access to the Flash.
This is particularly efficient when the processor is running in Thumb mode.
Two EFCs are embedded in the SAM7X512 to control each bank of 256 KBytes. Dual-plane organization allows
concurrent read and program functionality. Read from one memory plane may be performed even while program or
erase functions are being executed in the other memory plane.
One EFC is embedded in the SAM7X256/128 to control the single plane of 256/128 KBytes.
SAM7X Series [DATASHEET] 20
6120K–ATARM–11-Feb-14