SAM7X128_14 Datasheet, PDF (39/662 Pages) ATMEL Corporation – ARM-based Flash MCU

11.2
ARM7TDMI Processor
For further details on ARM7TDMI, refer to the following ARM documents:
ARM Architecture Reference Manual (DDI 0100E)
ARM7TDMI Technical Reference Manual (DDI 0210B)
11.2.1 Instruction Type
Instructions are either 32 bits long (in ARM state) or 16 bits long (in THUMB state).
11.2.2 Data Type
ARM7TDMI supports byte (8-bit), half-word (16-bit) and word (32-bit) data types. Words must be aligned to four-byte
boundaries and half words to two-byte boundaries.
Unaligned data access behavior depends on which instruction is used where.
11.2.3 ARM7TDMI Operating Mode
The ARM7TDMI, based on ARM architecture v4T, supports seven processor modes:
User: The normal ARM program execution state
FIQ: Designed to support high-speed data transfer or channel process
IRQ: Used for general-purpose interrupt handling
Supervisor: Protected mode for the operating system
Abort mode: Implements virtual memory and/or memory protection
System: A privileged user mode for the operating system
Undefined: Supports software emulation of hardware coprocessors
Mode changes may be made under software control, or may be brought about by external interrupts or exception
processing. Most application programs execute in User mode. The non-user modes, or privileged modes, are entered in
order to service interrupts or exceptions, or to access protected resources.
11.2.4 ARM7TDMI Registers
The ARM7TDMI processor has a total of 37registers:
 31 general-purpose 32-bit registers
 6 status registers
These registers are not accessible at the same time. The processor state and operating mode determine which registers
are available to the programmer.
At any one time 16 registers are visible to the user. The remainder are synonyms used to speed up exception
processing.
Register 15 is the Program Counter (PC) and can be used in all instructions to reference data relative to the current
instruction.
R14 holds the return address after a subroutine call.
R13 is used (by software convention) as a stack pointer.
Registers R0 to R7 are unbanked registers. This means that each of them refers to the same 32-bit physical register in all
processor modes. They are general-purpose registers, with no special uses managed by the architecture, and can be
used wherever an instruction allows a general-purpose register to be specified.
Registers R8 to R14 are banked registers. This means that each of them depends on the current mode of the processor.
SAM7X Series [DATASHEET] 39
6120K–ATARM–11-Feb-14