SAM7X128_14 Datasheet, PDF (34/662 Pages) ATMEL Corporation – ARM-based Flash MCU

10.6
Ethernet MAC
 DMA Master on Receive and Transmit Channels
 Compatible with IEEE Standard 802.3
 10 and 100 Mbit/s operation
 Full- and half-duplex operation
 Statistics Counter Registers
 MII/RMII interface to the physical layer
 Interrupt generation to signal receive and transmit completion
 28-byte transmit FIFO and 28-byte receive FIFO
 Automatic pad and CRC generation on transmitted frames
 Automatic discard of frames received with errors
 Address checking logic supports up to four specific 48-bit addresses
 Support Promiscuous Mode where all valid received frames are copied to memory
 Hash matching of unicast and multicast destination addresses
 Physical layer management through MDIO interface
 Half-duplex flow control by forcing collisions on incoming frames
 Full-duplex flow control with recognition of incoming pause frames
 Support for 802.1Q VLAN tagging with recognition of incoming VLAN and priority tagged frames
 Multiple buffers per receive and transmit frame
 Jumbo frames up to 10240 bytes supported
10.7
Serial Peripheral Interface
 Supports communication with external serial devices
 Four chip selects with external decoder allow communication with up to 15 peripherals
 Serial memories, such as DataFlash^® and 3-wire EEPROMs
 Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and Sensors
 External co-processors
 Master or slave serial peripheral bus interface
 8- to 16-bit programmable data length per chip select
 Programmable phase and polarity per chip select
 Programmable transfer delays per chip select, between consecutive transfers and between clock and data
 Programmable delay between consecutive transfers
 Selectable mode fault detection
 Maximum frequency at up to Master Clock
10.8
Two-wire Interface
 Master Mode only
 Compatibility with I²C compatible devices (refer to the TWI section of the datasheet)
 One, two or three bytes internal address registers for easy Serial Memory access
 7-bit or 10-bit slave addressing
 Sequential read/write operations
SAM7X Series [DATASHEET] 34
6120K–ATARM–11-Feb-14