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LM3S8G62 Datasheet, PDF (982/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller
Signal Tables
OBSOLETE: TI has discontinued production of this device.
Table 22-2. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Typea Description
PC2
I/O
TTL
GPIO port C bit 2.
78
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
79
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I
TTL
JTAG TMS and SWDIO.
PC0
I/O
TTL
GPIO port C bit 0.
80
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
81
VDD
-
Power Positive supply for I/O and some logic.
82
GND
-
Power Ground reference for logic and I/O pins.
83
VDD
-
Power Positive supply for I/O and some logic.
84
VDD
-
Power Positive supply for I/O and some logic.
85
GND
-
Power Ground reference for logic and I/O pins.
86
GND
-
Power Ground reference for logic and I/O pins.
87
GND
-
Power Ground reference for logic and I/O pins.
VDDC
88
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals. The voltage on this pin is
1.3 V and is supplied by the on-chip LDO. The VDDC pins should
only be connected to the LDO pin and an external capacitor as
specified in Table 24-6 on page 1036 .
PB7
I/O
TTL
GPIO port B bit 7.
89
NMI
I
TTL
Non-maskable interrupt.
PB6
I/O
TTL
GPIO port B bit 6.
C0+
I
Analog Analog comparator 0 positive input.
C0o
O
TTL
Analog comparator 0 output.
CCP1
I/O
TTL
Capture/Compare/PWM 1.
CCP5
I/O
TTL
Capture/Compare/PWM 5.
CCP7
I/O
TTL
Capture/Compare/PWM 7.
90
Fault1
I
TTL
PWM Fault 1.
IDX0
I
TTL
QEI module 0 index.
VREFA
I
Analog This input provides a reference voltage used to specify the input
voltage at which the ADC converts to a maximum value. In other
words, the voltage that is applied to VREFA is the voltage with which
an AINn signal is converted to 4095. The VREFA input is limited
to the range specified in Table 24-22 on page 1043 .
982
July 24, 2012
Texas Instruments-Production Data