LM3S8G62 Datasheet, PDF (278/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

Hibernation Module
OBSOLETE: TI has discontinued production of this device.
6.1
Block Diagram
Figure 6-1. Hibernation Module Block Diagram
XOSC0
XOSC1
WAKE
HIBCTL.CLK32EN
/128
HIBCTL.CLKSEL
Pre-Divider
HIBRTCT
Battery-Backed
Memory
64 words
HIBDATA
RTC
HIBRTCC
HIBRTCLD
HIBRTCM0
HIBRTCM1
HIBCTL.RTCEN
Interrupts
HIBIM
HIBRIS
HIBMIS
HIBIC
MATCH0/1
LOWBAT
Low Battery
Power
V_BAT
Detect
Sequence
Logic
HIBCTL.LOWBATEN
HIBCTL.PWRCUT
HIBCTL.RTCWEN
HIBCTL.EXTWEN
HIBCTL.VABORT
HIBCTL.HIBREQ
Clock Source for
System Clock
Interrupts
to CPU
HIB
6.2 Signal Description
The following table lists the external signals of the Hibernation module and describes the function
of each. These signals have dedicated functions and are not alternate functions for any GPIO signals.
Table 6-1. Hibernate Signals (100LQFP)
Pin Name
Pin Number Pin Mux / Pin Pin Type Buffer Type^a Description
Assignment
HIB
51
fixed
O
OD
An output that indicates the processor is in
Hibernate mode.
VBAT
55
fixed
-
Power Power source for the Hibernation module. It is
normally connected to the positive terminal of a
battery and serves as the battery
backup/Hibernation module power-source supply.
WAKE
50
fixed
I
TTL
An external input that brings the processor out of
Hibernate mode when asserted.
XOSC0
52
fixed
I
Analog Hibernation module oscillator crystal input or an
external clock reference input. Note that this is
either a 4.194304-MHz crystal or a 32.768-kHz
oscillator for the Hibernation module RTC. See the
CLKSEL bit in the HIBCTL register.
XOSC1
53
fixed
O
Analog Hibernation module oscillator crystal output. Leave
unconnected when using a single-ended clock
source.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
278
July 24, 2012
Texas Instruments-Production Data