LM3S8G62 Datasheet, PDF (1016/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

Signal Tables
OBSOLETE: TI has discontinued production of this device.
Table 22-8. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Mux / Pin Pin Type Buffer Type^a Description
Assignment
VDDC
F3
fixed
D3
G3
C3
-
Power Positive supply for most of the logic function,
including the processor core and most peripherals.
The voltage on this pin is 1.3 V and is supplied by
the on-chip LDO. The VDDC pins should only be
connected to the LDO pin and an external capacitor
as specified in Table 24-6 on page 1036 .
VREFA
A7
PB6
I
Analog This input provides a reference voltage used to
specify the input voltage at which the ADC converts
to a maximum value. In other words, the voltage
that is applied to VREFA is the voltage with which
an AINn signal is converted to 4095. The VREFA
input is limited to the range specified in Table
24-22 on page 1043 .
WAKE
M10
fixed
I
TTL
An external input that brings the processor out of
Hibernate mode when asserted.
XOSC0
K11
fixed
I
Analog Hibernation module oscillator crystal input or an
external clock reference input. Note that this is
either a 4.194304-MHz crystal or a 32.768-kHz
oscillator for the Hibernation module RTC. See the
CLKSEL bit in the HIBCTL register.
XOSC1
K12
fixed
O
Analog Hibernation module oscillator crystal output. Leave
unconnected when using a single-ended clock
source.
XTALNPHY
J1
fixed
O
Analog Ethernet PHY XTALN 25-MHz oscillator crystal
output. Leave this pin unconnected when using a
single-ended 25-MHz clock input connected to the
XTALPPHY pin.
XTALPPHY
J2
fixed
I
Analog Ethernet PHY XTALP 25-MHz oscillator crystal
input or external clock reference input.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
1016
Texas Instruments-Production Data
July 24, 2012