LM3S8G62 Datasheet, PDF (8/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

Table of Contents
OBSOLETE: TI has discontinued production of this device.
15.3.5 Command Sequence Flow Charts ................................................................................ 726
15.4 Initialization and Configuration ..................................................................................... 733
15.5 Register Map .............................................................................................................. 734
15.6 Register Descriptions (I²C Master) ............................................................................... 735
15.7 Register Descriptions (I²C Slave) ................................................................................. 748
16 Controller Area Network (CAN) Module ............................................................. 757
16.1 Block Diagram ............................................................................................................ 758
16.2 Signal Description ....................................................................................................... 758
16.3 Functional Description ................................................................................................. 759
16.3.1 Initialization ................................................................................................................. 760
16.3.2 Operation ................................................................................................................... 761
16.3.3 Transmitting Message Objects ..................................................................................... 762
16.3.4 Configuring a Transmit Message Object ........................................................................ 762
16.3.5 Updating a Transmit Message Object ........................................................................... 763
16.3.6 Accepting Received Message Objects .......................................................................... 764
16.3.7 Receiving a Data Frame .............................................................................................. 764
16.3.8 Receiving a Remote Frame .......................................................................................... 764
16.3.9 Receive/Transmit Priority ............................................................................................. 765
16.3.10 Configuring a Receive Message Object ........................................................................ 765
16.3.11 Handling of Received Message Objects ........................................................................ 766
16.3.12 Handling of Interrupts .................................................................................................. 768
16.3.13 Test Mode ................................................................................................................... 769
16.3.14 Bit Timing Configuration Error Considerations ............................................................... 771
16.3.15 Bit Time and Bit Rate ................................................................................................... 771
16.3.16 Calculating the Bit Timing Parameters .......................................................................... 773
16.4 Register Map .............................................................................................................. 776
16.5 CAN Register Descriptions .......................................................................................... 777
17 Ethernet Controller .............................................................................................. 807
17.1 Block Diagram ............................................................................................................ 808
17.2 Signal Description ....................................................................................................... 809
17.3 Functional Description ................................................................................................. 810
17.3.1 MAC Operation ........................................................................................................... 810
17.3.2 Internal MII Operation .................................................................................................. 813
17.3.3 PHY Operation ............................................................................................................ 813
17.3.4 Interrupts .................................................................................................................... 816
17.3.5 DMA Operation ........................................................................................................... 816
17.4 Initialization and Configuration ..................................................................................... 817
17.4.1 Hardware Configuration ............................................................................................... 817
17.4.2 Software Configuration ................................................................................................ 818
17.5 Register Map .............................................................................................................. 818
17.6 Ethernet MAC Register Descriptions ............................................................................. 820
17.7 MII Management Register Descriptions ......................................................................... 845
18 Analog Comparators ............................................................................................ 866
18.1 Block Diagram ............................................................................................................ 866
18.2 Signal Description ....................................................................................................... 867
18.3 Functional Description ................................................................................................. 867
18.3.1 Internal Reference Programming .................................................................................. 868
18.4 Initialization and Configuration ..................................................................................... 869
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July 24, 2012
Texas Instruments-Production Data