LM3S8G62 Datasheet, PDF (952/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Quadrature Encoder Interface (QEI)
Table 20-1. QEI Signals (100LQFP) (continued)
Pin Name
Pin Number Pin Mux / Pin Pin Type Buffer Type^a Description
Assignment
PhB1
11
PD1 (11)
I
74
PE2 (3)
TTL
QEI module 1 phase B.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
Table 20-2. QEI Signals (108BGA)
Pin Name
Pin Number Pin Mux / Pin Pin Type Buffer Type^a Description
Assignment
IDX0
G1
PD0 (3)
I
C11
PB2 (2)
A7
PB6 (5)
A6
PB4 (6)
A2
PD7 (1)
TTL
QEI module 0 index.
IDX1
H12
PF1 (2)
I
TTL
QEI module 1 index.
PhA0
G2
PD1 (3)
I
L1
PC4 (2)
B11
PE2 (4)
TTL
QEI module 0 phase A.
PhA1
A12
PE3 (3)
I
TTL
QEI module 1 phase A.
PhB0
L2
PC7 (2)
I
M2
PC6 (2)
M9
PF0 (2)
A12
PE3 (4)
TTL
QEI module 0 phase B.
PhB1
G2
PD1 (11)
I
B11
PE2 (3)
TTL
QEI module 1 phase B.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
20.3
Functional Description
The QEI module interprets the two-bit gray code produced by a quadrature encoder wheel to integrate
position over time and determine direction of rotation. In addition, it can capture a running estimate
of the velocity of the encoder wheel.
The position integrator and velocity capture can be independently enabled, though the position
integrator must be enabled before the velocity capture can be enabled. The two phase signals, PhA
and PhB, can be swapped before being interpreted by the QEI module to change the meaning of
forward and backward and to correct for miswiring of the system. Alternatively, the phase signals
can be interpreted as a clock and direction signal as output by some encoders.
The QEI module input signals have a digital noise filter on them that can be enabled to prevent
spurious operation. The noise filter requires that the inputs be stable for a specified number of
consecutive clock cycles before updating the edge detector. The filter is enabled by the FILTEN bit
in the QEI Control (QEICTL) register. The frequency of the input update is programmable using
the FILTCNT bit field in the QEICTL register.
The QEI module supports two modes of signal operation: quadrature phase mode and clock/direction
mode. In quadrature phase mode, the encoder produces two clocks that are 90 degrees out of
phase; the edge relationship is used to determine the direction of rotation. In clock/direction mode,
the encoder produces a clock signal to indicate steps and a direction signal to indicate the direction
of rotation. This mode is determined by the SIGMODE bit of the QEICTL register (see page 957).
When the QEI module is set to use the quadrature phase mode (SIGMODE bit is clear), the capture
mode for the position integrator can be set to update the position counter on every edge of the PhA
952
July 24, 2012
Texas Instruments-Production Data