LM3S8G62 Datasheet, PDF (976/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

Signal Tables
OBSOLETE: TI has discontinued production of this device.
22.1 100-Pin LQFP Package Pin Tables
22.1.1 Signals by Pin Number
Table 22-2. Signals by Pin Number
Pin Number
1
2
Pin Name
PE7
AIN0
PWM5
PE6
AIN1
C1o
PWM4
VDDA
Pin Type
I/O
I
O
I/O
I
O
O
-
3
GNDA
-
4
PE5
I/O
5
AIN2
I
CCP5
I/O
PE4
I/O
AIN3
I
6
CCP2
I/O
CCP3
I/O
Fault0
I
LDO
-
7
8
VDD
-
9
GND
-
PD0
I/O
AIN15
I
CAN0Rx
I
10
CCP6
I/O
IDX0
I
PWM0
O
U1Rx
I
Buffer Type^a Description
TTL
GPIO port E bit 7.
Analog Analog-to-digital converter input 0.
TTL
PWM 5. This signal is controlled by PWM Generator 2.
TTL
GPIO port E bit 6.
Analog Analog-to-digital converter input 1.
TTL
Analog comparator 1 output.
TTL
PWM 4. This signal is controlled by PWM Generator 2.
Power
The positive supply for the analog circuits (ADC, Analog
Comparators, etc.). These are separated from VDD to minimize
the electrical noise contained on VDD from affecting the analog
functions. VDDA pins must be supplied with a voltage that meets
the specification in Table 24-2 on page 1031 , regardless of system
implementation.
Power
The ground reference for the analog circuits (ADC, Analog
Comparators, etc.). These are separated from GND to minimize
the electrical noise contained on VDD from affecting the analog
functions.
TTL
GPIO port E bit 5.
Analog Analog-to-digital converter input 2.
TTL
Capture/Compare/PWM 5.
TTL
GPIO port E bit 4.
Analog Analog-to-digital converter input 3.
TTL
Capture/Compare/PWM 2.
TTL
Capture/Compare/PWM 3.
TTL
PWM Fault 0.
Power
Low drop-out regulator output voltage. This pin requires an external
capacitor between the pin and GND of 1 µF or greater. The LDO
pin must also be connected to the VDDC pins at the board level in
addition to the decoupling capacitor(s).
Power Positive supply for I/O and some logic.
Power Ground reference for logic and I/O pins.
TTL
GPIO port D bit 0.
Analog Analog-to-digital converter input 15.
TTL
CAN module 0 receive.
TTL
Capture/Compare/PWM 6.
TTL
QEI module 0 index.
TTL
PWM 0. This signal is controlled by PWM Generator 0.
TTL
UART module 1 receive. When in IrDA mode, this signal has IrDA
modulation.
976
July 24, 2012
Texas Instruments-Production Data