LM3S8G62 Datasheet, PDF (977/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S8G62 Microcontroller
Table 22-2. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PD1
I/O
TTL
GPIO port D bit 1.
AIN14
I
Analog Analog-to-digital converter input 14.
CAN0Tx
O
TTL
CAN module 0 transmit.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
11
CCP7
I/O
TTL
Capture/Compare/PWM 7.
PWM1
O
TTL
PWM 1. This signal is controlled by PWM Generator 0.
PhA0
I
TTL
QEI module 0 phase A.
PhB1
I
TTL
QEI module 1 phase B.
U1Tx
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
PD2
I/O
TTL
GPIO port D bit 2.
AIN13
I
Analog Analog-to-digital converter input 13.
CCP5
I/O
TTL
Capture/Compare/PWM 5.
12
CCP6
I/O
TTL
Capture/Compare/PWM 6.
PWM2
O
TTL
PWM 2. This signal is controlled by PWM Generator 1.
U1Rx
I
TTL
UART module 1 receive. When in IrDA mode, this signal has IrDA
modulation.
PD3
I/O
TTL
GPIO port D bit 3.
AIN12
I
Analog Analog-to-digital converter input 12.
CCP0
I/O
TTL
Capture/Compare/PWM 0.
13
CCP7
I/O
TTL
Capture/Compare/PWM 7.
PWM3
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
U1Tx
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
VDDC
14
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals. The voltage on this pin is
1.3 V and is supplied by the on-chip LDO. The VDDC pins should
only be connected to the LDO pin and an external capacitor as
specified in Table 24-6 on page 1036 .
15
GND
-
Power Ground reference for logic and I/O pins.
16
XTALPPHY
I
Analog Ethernet PHY XTALP 25-MHz oscillator crystal input or external
clock reference input.
XTALNPHY
O
Analog Ethernet PHY XTALN 25-MHz oscillator crystal output. Leave this
17
pin unconnected when using a single-ended 25-MHz clock input
connected to the XTALPPHY pin.
PG1
I/O
TTL
GPIO port G bit 1.
18
PWM1
O
TTL
PWM 1. This signal is controlled by PWM Generator 0.
PWM5
O
TTL
PWM 5. This signal is controlled by PWM Generator 2.
PG0
I/O
TTL
GPIO port G bit 0.
19
PWM0
O
TTL
PWM 0. This signal is controlled by PWM Generator 0.
PWM4
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
20
VDD
-
Power Positive supply for I/O and some logic.
21
GND
-
Power Ground reference for logic and I/O pins.
July 24, 2012
977
Texas Instruments-Production Data