LM3S8G62 Datasheet, PDF (1022/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

Signal Tables
OBSOLETE: TI has discontinued production of this device.
Table 22-9. Signals by Function, Except for GPIO (continued)
Function
Pin Name Pin Number Pin Type Buffer Type^a
Description
GND
C4
-
Power Ground reference for logic and I/O pins.
H3
C5
J3
K6
K4
K5
L10
K10
F10
J10
F11
C8
C9
B6
F12
GNDA
A5
-
Power The ground reference for the analog circuits (ADC,
B5
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
Power
LDO
E3
-
Power Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
connected to the VDDC pins at the board level in
addition to the decoupling capacitor(s).
VDD
K7
-
Power Positive supply for I/O and some logic.
G12
K8
C10
K9
H10
G10
E10
D10
D11
G11
VDDA
C7
-
Power The positive supply for the analog circuits (ADC,
C6
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in Table 24-2 on page 1031 , regardless
of system implementation.
VDDC
F3
-
Power Positive supply for most of the logic function,
D3
including the processor core and most peripherals.
G3
The voltage on this pin is 1.3 V and is supplied by
C3
the on-chip LDO. The VDDC pins should only be
connected to the LDO pin and an external capacitor
as specified in Table 24-6 on page 1036 .
1022
Texas Instruments-Production Data
July 24, 2012