LM3S8G62 Datasheet, PDF (1074/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Register Quick Reference
31
30
29
28
27
26
25
24
15
14
13
12
11
10
9
8
SSIPeriphID4, type RO, offset 0xFD0, reset 0x0000.0000 (see page 708)
SSIPeriphID5, type RO, offset 0xFD4, reset 0x0000.0000 (see page 709)
SSIPeriphID6, type RO, offset 0xFD8, reset 0x0000.0000 (see page 710)
SSIPeriphID7, type RO, offset 0xFDC, reset 0x0000.0000 (see page 711)
SSIPeriphID0, type RO, offset 0xFE0, reset 0x0000.0022 (see page 712)
SSIPeriphID1, type RO, offset 0xFE4, reset 0x0000.0000 (see page 713)
SSIPeriphID2, type RO, offset 0xFE8, reset 0x0000.0018 (see page 714)
SSIPeriphID3, type RO, offset 0xFEC, reset 0x0000.0001 (see page 715)
SSIPCellID0, type RO, offset 0xFF0, reset 0x0000.000D (see page 716)
SSIPCellID1, type RO, offset 0xFF4, reset 0x0000.00F0 (see page 717)
SSIPCellID2, type RO, offset 0xFF8, reset 0x0000.0005 (see page 718)
SSIPCellID3, type RO, offset 0xFFC, reset 0x0000.00B1 (see page 719)
Inter-Integrated Circuit (I²C) Interface
I²C Master
I2C 0 base: 0x4002.0000
I2CMSA, type R/W, offset 0x000, reset 0x0000.0000
I2CMCS, type RO, offset 0x004, reset 0x0000.0020 (Read-Only Status Register)
I2CMCS, type WO, offset 0x004, reset 0x0000.0020 (Write-Only Control Register)
I2CMDR, type R/W, offset 0x008, reset 0x0000.0000
23
22
21
20
19
18
17
16
7
6
5
4
3
2
1
0
PID4
PID5
PID6
PID7
PID0
PID1
PID2
PID3
CID0
CID1
CID2
CID3
SA
R/S
BUSBSY IDLE ARBLST DATACK ADRACK ERROR BUSY
ACK
STOP START RUN
DATA
1074
Texas Instruments-Production Data
July 24, 2012