LM3S8G62 Datasheet, PDF (820/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

Ethernet Controller
OBSOLETE: TI has discontinued production of this device.
Table 17-4. Ethernet Register Map (continued)
Offset Name
Type
Reset
-
MR3
RO
0xB410
-
MR4
R/W
0x01E1
-
MR5
RO
0x0001
-
MR6
RO
0x0000
-
MR16
RO
0x0040
-
MR17
R/W
0x0002
-
MR27
-
MR29
-
MR30
-
MR31
RO
-
RO
0x0000
R/W
0x0000
R/W
0x0040
Description
See
page
Ethernet PHY Management Register 3 – PHY Identifier
2
851
Ethernet PHY Management Register 4 – Auto-Negotiation
Advertisement
852
Ethernet PHY Management Register 5 – Auto-Negotiation
Link Partner Base Page Ability
854
Ethernet PHY Management Register 6 – Auto-Negotiation
Expansion
856
Ethernet PHY Management Register 16 –
Vendor-Specific
857
Ethernet PHY Management Register 17 – Mode
Control/Status
858
Ethernet PHY Management Register 27 – Special
Control/Status
860
Ethernet PHY Management Register 29 – Interrupt Status 861
Ethernet PHY Management Register 30 – Interrupt Mask 863
Ethernet PHY Management Register 31 – PHY Special
Control/Status
865
17.6
Ethernet MAC Register Descriptions
The remainder of this section lists and describes the Ethernet MAC registers, in numerical order by
address offset. Also see “MII Management Register Descriptions” on page 845.
820
July 24, 2012
Texas Instruments-Production Data