LM3S8G62 Datasheet, PDF(410/1096 Page) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

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LM3S8G62 Datasheet, PDF (410/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

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OBSOLETE: TI has discontinued production of this device.

General-Purpose Input/Outputs (GPIOs)

signals are 5-V tolerant and are connected directly to their circuitry (C0-, C0+, C1-, C1+). These

signals are configured by clearing the DEN bit in the GPIO Digital Enable (GPIODEN) register. All

GPIO signals are 5-V tolerant when configured as inputs except for PB0 and PB1, which are limited

to 3.6 V. The digital alternate hardware functions are enabled by setting the appropriate bit in the

GPIO Alternate Function Select (GPIOAFSEL) and GPIODEN registers and configuring the PMCx

bit field in the GPIO Port Control (GPIOPCTL) register to the numeric encoding shown in the table

below. Note that each pin must be programmed individually; no type of grouping is implied by the

columns in the table. Table entries that are shaded gray are the default values for the corresponding

GPIO pin.

Important: All GPIO pins are configured as GPIOs and tri-stated by default (GPIOAFSEL=0,

GPIODEN=0, GPIOPDR=0, GPIOPUR=0, and GPIOPCTL=0, with the exception of the

pins shown in the table below. A Power-On-Reset (POR) or asserting RST puts the pins

back to their default state.

Table 9-1. GPIO Pins With Non-Zero Reset Values

GPIO Pins

PA[1:0]

PA[5:2]

PB[3:2]

PC[3:0]

Default State

UART0

SSI0

I2C0

JTAG/SWD

GPIOAFSEL GPIODEN GPIOPDR GPIOPUR

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

1

GPIOPCTL

0x1

0x2

0x3

0x1

Table 9-2. GPIO Pins and Alternate Functions (100LQFP)

IO

Pin

Analog

Function

1

2

Digital Function (GPIOPCTL PMCx Bit Field Encoding)a

3

4

5

6

7

8

9

10

11

PA0 26

-

U0Rx

-

-

-

-

-

-

-

U1Rx

-

-

PA1 27

-

U0Tx

-

-

-

-

-

-

-

U1Tx

-

-

PA2 28

- SSI0Clk -

-

PWM4

-

-

-

-

-

-

-

PA3 29

- SSI0Fss -

-

PWM5

-

-

-

-

-

-

-

PA4 30

- SSI0Rx -

-

- CAN0Rx -

-

-

-

-

-

PA5 31

- SSI0Tx -

-

- CAN0Tx -

-

-

-

-

-

PA6 34

-

-

CCP1

-

PWM0 PWM4 CAN0Rx -

-

-

-

-

PA7 35

-

-

CCP4

-

PWM1 PWM5 CAN0Tx CCP3

-

-

-

-

PB0 66

-

CCP0 PWM2

-

-

U1Rx

-

-

-

-

-

-

PB1 67

-

CCP2 PWM3

-

CCP1 U1Tx

-

-

-

-

-

-

PB2 70

- I2C0SCL IDX0

-

CCP3 CCP0

-

-

-

-

-

-

PB3 71

- I2C0SDA Fault0 - Fault3 -

-

-

-

-

-

-

PB4 92 AIN10

-

-

-

- CAN0Rx IDX0 U1Rx

-

-

-

-

C0-

PB5 91 AIN11 C0o CCP5 CCP6 CCP0 CAN0Tx CCP2 U1Tx

-

-

-

-

C1-

PB6 90 VREFA CCP1 CCP7 C0o Fault1 IDX0 CCP5

-

-

-

-

-

C0+

PB7 89

-

-

-

-

NMI

-

-

-

-

-

-

-

PC0 80

-

-

-

TCK

-

-

-

-

-

-

-

-

SWCLK

410

July 24, 2012

Texas Instruments-Production Data

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