LM3S8G62 Datasheet, PDF (413/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S8G62 Microcontroller
Table 9-3. GPIO Pins and Alternate Functions (108BGA) (continued)
IO
Pin
Analog
Function
1
2
Digital Function (GPIOPCTL PMCx Bit Field Encoding)^a
3
4
5
6
7
8
9
PF1 H12
-
-
IDX1 PWM1
-
-
-
-
-
-
PF2 J11
-
LED1 PWM4
-
PWM2
-
-
-
-
-
PF3 J12
-
LED0 PWM5
-
PWM3
-
-
-
-
-
PG0 K1
-
-
PWM0
-
PWM4
-
-
-
-
-
PG1 K2
-
-
PWM1
-
PWM5
-
-
-
-
-
a. The digital signals that are shaded gray are the power-on default values for the corresponding GPIO pin.
10
11
CCP3
-
-
-
-
-
-
-
-
-
9.2 Functional Description
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure
9-1 on page 413 and Figure 9-2 on page 414). The LM3S8G62 microcontroller contains seven ports
and thus seven of these physical GPIO blocks. Note that not all pins may be implemented on every
block. Some GPIO pins can function as I/O signals for the on-chip peripheral modules. For information
on which GPIO pins are used for alternate hardware functions, refer to Table 22-5 on page 998.
Figure 9-1. Digital I/O Pads
Port
Control
GPIOPCTL
Commit
Control
GPIOLOCK
GPIOCR
Mode
Control
GPIOAFSEL
Periph 0
Periph 1
Periph n
Alternate Input
Alternate Output
Alternate Output Enable
Data
Control
GPIODATA
GPIODIR
GPIO Input
GPIO Output
GPIO Output Enable
Pad Input
Pad Output
Pad Output
Enable
Digital
I/O
Pad
Package I/O Pin
Interrupt
Interrupt
Control
GPIOIS
GPIOIBE
GPIOIEV
GPIOIM
GPIORIS
GPIOMIS
GPIOICR
Pad
Control
GPIODR2R
GPIODR4R
GPIODR8R
GPIOSLR
GPIOPUR
GPIOPDR
GPIOODR
GPIODEN
Identification Registers
GPIOPeriphID0
GPIOPeriphID1
GPIOPeriphID2
GPIOPeriphID3
GPIOPeriphID4
GPIOPeriphID5
GPIOPeriphID6
GPIOPeriphID7
GPIOPCellID0
GPIOPCellID1
GPIOPCellID2
GPIOPCellID3
July 24, 2012
413
Texas Instruments-Production Data