LM3S8G62 Datasheet, PDF (11/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S8G62 Microcontroller
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Stellaris LM3S8G62 Microcontroller High-Level Block Diagram ............................... 36
CPU Block Diagram ............................................................................................. 58
TPIU Block Diagram ............................................................................................ 59
Cortex-M3 Register Set ........................................................................................ 61
Bit-Band Mapping ................................................................................................ 81
Data Storage ....................................................................................................... 82
Vector Table ........................................................................................................ 88
Exception Stack Frame ........................................................................................ 90
SRD Use Example ............................................................................................. 105
JTAG Module Block Diagram .............................................................................. 166
Test Access Port State Machine ......................................................................... 169
IDCODE Register Format ................................................................................... 175
BYPASS Register Format ................................................................................... 175
Boundary Scan Register Format ......................................................................... 176
Basic RST Configuration .................................................................................... 180
External Circuitry to Extend Power-On Reset ....................................................... 181
Reset Circuit Controlled by Switch ...................................................................... 181
Power Architecture ............................................................................................ 184
Main Clock Tree ................................................................................................ 187
Hibernation Module Block Diagram ..................................................................... 278
Using a Crystal as the Hibernation Clock Source ................................................. 281
Using a Dedicated Oscillator as the Hibernation Clock Source with VDD3ON
Mode ................................................................................................................ 281
Internal Memory Block Diagram .......................................................................... 304
μDMA Block Diagram ......................................................................................... 350
Example of Ping-Pong μDMA Transaction ........................................................... 356
Memory Scatter-Gather, Setup and Configuration ................................................ 358
Memory Scatter-Gather, μDMA Copy Sequence .................................................. 359
Peripheral Scatter-Gather, Setup and Configuration ............................................. 361
Peripheral Scatter-Gather, μDMA Copy Sequence ............................................... 362
Digital I/O Pads ................................................................................................. 413
Analog/Digital I/O Pads ...................................................................................... 414
GPIODATA Write Example ................................................................................. 415
GPIODATA Read Example ................................................................................. 415
GPTM Module Block Diagram ............................................................................ 463
Timer Daisy Chain ............................................................................................. 468
Input Edge-Count Mode Example ....................................................................... 470
16-Bit Input Edge-Time Mode Example ............................................................... 472
16-Bit PWM Mode Example ................................................................................ 473
WDT Module Block Diagram .............................................................................. 510
Implementation of Two ADC Blocks .................................................................... 535
ADC Module Block Diagram ............................................................................... 536
ADC Sample Phases ......................................................................................... 540
Doubling the ADC Sample Rate .......................................................................... 541
Skewed Sampling .............................................................................................. 541
Sample Averaging Example ............................................................................... 542
July 24, 2012
11
Texas Instruments-Production Data