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LM3S8G62 Datasheet, PDF (48/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller
OBSOLETE: TI has discontinued production of this device.
Architectural Overview
1.3.4.4
The General-Purpose Timer Module (GPTM) contains four GPTM blocks with the following functional
options:
■ Operating modes:
– 16- or 32-bit programmable one-shot timer
– 16- or 32-bit programmable periodic timer
– 16-bit general-purpose timer with an 8-bit prescaler
– 32-bit Real-Time Clock (RTC) when using an external 32.768-KHz clock as the input
– 16-bit input-edge count- or time-capture modes
– 16-bit PWM mode with software-programmable output inversion of the PWM signal
■ Count up or down
■ Eight Capture Compare PWM pins (CCP)
■ Daisy chaining of timer modules to allow a single timer to initiate multiple timing events
■ ADC event trigger
■ User-enabled stalling when the microcontroller asserts CPU Halt flag during debug (excluding
RTC mode)
■ Ability to determine the elapsed time between the assertion of the timer interrupt and entry into
the interrupt service routine.
■ Efficient transfers using Micro Direct Memory Access Controller (µDMA)
– Dedicated channel for each timer
– Burst request generated on timer interrupt
CCP Pins (see page 469)
Capture Compare PWM pins (CCP) can be used by the General-Purpose Timer Module to time/count
external events using the CCP pin as an input. Alternatively, the GPTM can generate a simple PWM
output on the CCP pin.
The LM3S8G62 microcontroller includes eight Capture Compare PWM pins (CCP) that can be
programmed to operate in the following modes:
■ Capture: The GP Timer is incremented/decremented by programmed events on the CCP input.
The GP Timer captures and stores the current timer value when a programmed event occurs.
■ Compare: The GP Timer is incremented/decremented by programmed events on the CCP input.
The GP Timer compares the current value with a stored value and generates an interrupt when
a match occurs.
■ PWM: The GP Timer is incremented/decremented by the system clock. A PWM signal is generated
based on a match between the counter value and a value stored in a match register and is output
on the CCP pin.
48
July 24, 2012
Texas Instruments-Production Data