LM3S8G62 Datasheet, PDF (3/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S8G62 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 30
About This Document .................................................................................................................... 32
Audience .............................................................................................................................................. 32
About This Manual ................................................................................................................................ 32
Related Documents ............................................................................................................................... 32
Documentation Conventions .................................................................................................................. 33
1
1.1
1.2
1.3
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
1.3.6
1.3.7
1.3.8
1.4
Architectural Overview .......................................................................................... 35
Overview ...................................................................................................................... 35
Target Applications ........................................................................................................ 37
Features ....................................................................................................................... 37
ARM Cortex-M3 Processor Core .................................................................................... 37
On-Chip Memory ........................................................................................................... 39
Serial Communications Peripherals ................................................................................ 40
System Integration ........................................................................................................ 45
Advanced Motion Control ............................................................................................... 50
Analog .......................................................................................................................... 52
JTAG and ARM Serial Wire Debug ................................................................................ 54
Packaging and Temperature .......................................................................................... 55
Hardware Details .......................................................................................................... 55
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
2.5.3
The Cortex-M3 Processor ...................................................................................... 56
Block Diagram .............................................................................................................. 57
Overview ...................................................................................................................... 58
System-Level Interface .................................................................................................. 58
Integrated Configurable Debug ...................................................................................... 58
Trace Port Interface Unit (TPIU) ..................................................................................... 59
Cortex-M3 System Component Details ........................................................................... 59
Programming Model ...................................................................................................... 60
Processor Mode and Privilege Levels for Software Execution ........................................... 60
Stacks .......................................................................................................................... 60
Register Map ................................................................................................................ 61
Register Descriptions .................................................................................................... 62
Exceptions and Interrupts .............................................................................................. 75
Data Types ................................................................................................................... 75
Memory Model .............................................................................................................. 75
Memory Regions, Types and Attributes ........................................................................... 77
Memory System Ordering of Memory Accesses .............................................................. 77
Behavior of Memory Accesses ....................................................................................... 78
Software Ordering of Memory Accesses ......................................................................... 78
Bit-Banding ................................................................................................................... 80
Data Storage ................................................................................................................ 82
Synchronization Primitives ............................................................................................. 82
Exception Model ........................................................................................................... 83
Exception States ........................................................................................................... 84
Exception Types ............................................................................................................ 84
Exception Handlers ....................................................................................................... 87
July 24, 2012
3
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