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LM3S8G62 Datasheet, PDF (865/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller
OBSOLETE: TI has discontinued production of this device.
Stellaris® LM3S8G62 Microcontroller
Register 29: Ethernet PHY Management Register 31 – PHY Special
Control/Status (MR31), address 0x1F
This register provides special control and status for the PHY layer.
Ethernet PHY Management Register 31 – PHY Special Control/Status (MR31)
Base 0x4004.8000
Address 0x1F
Type R/W, reset 0x0040
15
14
13
12
11
10
9
8
7
6
5
reserved
AUTODONE
reserved
Type R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
4
3
2
1
0
SPEED
reserved SCRDIS
RO
RO
RO
R/W
R/W
0
0
0
0
0
Bit/Field
15:13
12
Name
reserved
AUTODONE
Type
R/W
RO
Reset
0x0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Important: This bit field must always be written with a 0 to ensure
proper operation.
0
Auto Negotiation Done
Value Description
1 Auto negotiation is complete.
0 Auto negotiation is not complete.
11:5
reserved
RO
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
4:2
SPEED
RO
0x0
HCD Speed Value
Value
0x0
0x1
0x2
0x3-0x4
0x5
0x6
0x7
Description
Reserved
10BASE-T half duplex
100BASE-T half duplex
Reserved
10BASE-T full duplex
100BASE-T full duplex
Reserved
1
reserved
R/W
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
SCRDIS
R/W
0
Scramble Disable
Value Description
1 Disables data scrambling.
0 Enables data scrambling.
July 24, 2012
865
Texas Instruments-Production Data