LM3S8G62 Datasheet, PDF (644/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Universal Asynchronous Receivers/Transmitters (UARTs)
Bit/Field
6
5
4
3
Name
LIN
HSE
EOT
SMART
Type
R/W
R/W
R/W
R/W
Reset
0
Description
LIN Mode Enable
Value Description
1 The UART operates in LIN mode.
0 Normal operation.
0
High-Speed Enable
Value Description
0 The UART is clocked using the system clock divided by 16.
1 The UART is clocked using the system clock divided by 8.
Note:
System clock used is also dependent on the baud-rate divisor
configuration (see page 638) and page 639).
The state of this bit has no effect on clock generation in ISO
7816 smart card mode (the SMART bit is set).
0
End of Transmission
This bit determines the behavior of the TXRIS bit in the UARTRIS
register.
Value Description
1 The TXRIS bit is set only after all transmitted data, including
stop bits, have cleared the serializer.
0 The TXRIS bit is set when the transmit FIFO condition specified
in UARTIFLS is met.
0
ISO 7816 Smart Card Support
Value Description
1 The UART operates in Smart Card mode.
0 Normal operation.
The application must ensure that it sets 8-bit word length (WLEN set to
0x3) and even parity (PEN set to 1, EPS set to 1, SPS set to 0) in
UARTLCRH when using ISO 7816 mode.
In this mode, the value of the STP2 bit in UARTLCRH is ignored and
the number of stop bits is forced to 2. Note that the UART does not
support automatic retransmission on parity errors. If a parity error is
detected on transmission, all further transmit operations are aborted
and software must handle retransmission of the affected byte or
message.
644
July 24, 2012
Texas Instruments-Production Data