LM3S8G62 Datasheet, PDF (97/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S8G62 Microcontroller
Table 2-13. Cortex-M3 Instruction Summary (continued)
Mnemonic
REV16
REVSH
ROR, RORS
RRX, RRXS
RSB, RSBS
SBC, SBCS
SBFX
SDIV
SEV
SMLAL
SMULL
SSAT
STM
STMDB, STMEA
STMFD, STMIA
STR
STRB, STRBT
STRD
STREX
STREXB
STREXH
STRH, STRHT
STRSB, STRSBT
STRSH, STRSHT
STRT
SUB, SUBS
SUB, SUBW
SVC
SXTB
SXTH
TBB
TBH
TEQ
TST
UBFX
UDIV
UMLAL
UMULL
Operands
Rd, Rn
Rd, Rn
Rd, Rm, <Rs|#n>
Rd, Rm
{Rd,} Rn, Op2
{Rd,} Rn, Op2
Rd, Rn, #lsb, #width
{Rd,} Rn, Rm
-
RdLo, RdHi, Rn, Rm
RdLo, RdHi, Rn, Rm
Rd, #n, Rm {,shift #s}
Rn{!}, reglist
Rn{!}, reglist
Rn{!}, reglist
Rt, [Rn {, #offset}]
Rt, [Rn {, #offset}]
Rt, Rt2, [Rn {, #offset}]
Rt, Rt, [Rn {, #offset}]
Rd, Rt, [Rn]
Rd, Rt, [Rn]
Rt, [Rn {, #offset}]
Rt, [Rn {, #offset}]
Rt, [Rn {, #offset}]
Rt, [Rn {, #offset}]
{Rd,} Rn, Op2
{Rd,} Rn, #imm12
#imm
{Rd,} Rm {,ROR #n}
{Rd,} Rm {,ROR #n}
[Rn, Rm]
[Rn, Rm, LSL #1]
Rn, Op2
Rn, Op2
Rd, Rn, #lsb, #width
{Rd,} Rn, Rm
RdLo, RdHi, Rn, Rm
RdLo, RdHi, Rn, Rm
Brief Description
Flags
Reverse byte order in each halfword -
Reverse byte order in bottom halfword -
and sign extend
Rotate right
N,Z,C
Rotate right with extend
N,Z,C
Reverse subtract
N,Z,C,V
Subtract with carry
N,Z,C,V
Signed bit field extract
-
Signed divide
-
Send event
-
Signed multiply with accumulate
-
(32x32+64), 64-bit result
Signed multiply (32x32), 64-bit result -
Signed saturate
Q
Store multiple registers, increment after -
Store multiple registers, decrement -
before
Store multiple registers, increment after -
Store register word
-
Store register byte
-
Store register two words
-
Store register exclusive
-
Store register exclusive byte
-
Store register exclusive halfword
-
Store register halfword
-
Store register signed byte
-
Store register signed halfword
-
Store register word
-
Subtract
N,Z,C,V
Subtract 12-bit constant
N,Z,C,V
Supervisor call
-
Sign extend a byte
-
Sign extend a halfword
-
Table branch byte
-
Table branch halfword
-
Test equivalence
N,Z,C
Test
N,Z,C
Unsigned bit field extract
-
Unsigned divide
-
Unsigned multiply with accumulate
-
(32x32+32+32), 64-bit result
Unsigned multiply (32x 2), 64-bit result -
July 24, 2012
97
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