LM3S8G62 Datasheet, PDF (240/1096 Pages) Texas Instruments – Stellaris® LM3S8G62 Microcontroller

System Control
OBSOLETE: TI has discontinued production of this device.
Bit/Field
15
14
13
12
11
10
9
8
7
Name
DMACH15
DMACH14
DMACH13
DMACH12
DMACH11
DMACH10
DMACH9
DMACH8
DMACH7
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
1
1
1
1
1
1
1
1
1
Description
ADC0_SS1 / Timer2B
When set, indicates uDMA channel 15 is available and connected to
ADC module 0 Sample Sequencer 1. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of Timer 2B.
ADC0_SS0 / Timer2A
When set, indicates uDMA channel 14 is available and connected to
ADC module 0 Sample Sequencer 0. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of Timer 2A.
CAN0_TX / UART2_TX
When set, indicates uDMA channel 13 is available and connected to
the transmit path of CAN module 0. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of UART module 2 transmit.
CAN0_RX / UART2_RX
When set, indicates uDMA channel 12 is available and connected to
the receive path of CAN module 0. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of UART module 2 receive.
SSI0_TX / SSI1_TX
When set, indicates uDMA channel 11 is available and connected to
the transmit path of SSI module 0. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of SSI module 1 transmit.
SSI0_RX / SSI1_RX
When set, indicates uDMA channel 10 is available and connected to
the receive path of SSI module 0. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of SSI module 1 receive.
UART0_TX / UART1_TX
When set, indicates uDMA channel 9 is available and connected to the
transmit path of UART module 0. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of UART module 1 transmit.
UART0_RX / UART1_RX
When set, indicates uDMA channel 8 is available and connected to the
receive path of UART module 0. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of UART module 1 receive.
ETH_TX / Timer2B
When set, indicates uDMA channel 7 is available and connected to the
transmit path of the Ethernet module. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of Timer 2B.
240
July 24, 2012
Texas Instruments-Production Data