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PIC18F23K22 Datasheet, PDF (86/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
PIC18(L)F2X/4XK22
TABLE 5-2: REGISTER FILE SUMMARY FOR PIC18(L)F2X/4XK22 DEVICES
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
FA2h
IPR2
OSCFIP
C1IP
C2IP
EEIP
BCL1IP
HLVDIP
TMR3IP CCP2IP
FA1h
PIR2
OSCFIF
C1IF
C2IF
EEIF
BCL1IF
HLVDIF
TMR3IF CCP2IF
FA0h
PIE2
OSCFIE
C1IE
C2IE
EEIE
BCL1IE
HLVDIE
TMR3IE CCP2IE
F9Fh
IPR1
—
ADIP
RC1IP
TX1IP
SSP1IP
CCP1IP
TMR2IP TMR1IP
F9Eh PIR1
—
ADIF
RC1IF
TX1IF
SSP1IF
CCP1IF
TMR2IF TMR1IF
F9Dh PIE1
—
ADIE
RC1IE
TX1IE
SSP1IE
CCP1IE
TMR2IE TMR1IE
F9Ch HLVDCON VDIRMAG BGVST
IRVST
HLVDEN
HLVDL<3:0>
F9Bh
F96h
F95h
OSCTUNE
TRISE
TRISD(1)
INTSRC
WPUE3
TRISD7
PLLEN
—
TRISD6
—
TRISD5
—
TRISD4
TUN<5:0>
—
TRISE2(1)
TRISD3
TRISD2
TRISE1(1)
TRISD1
TRISE0(1)
TRISD0
F94h
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1 TRISC0
F93h
TRISB
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
TRISB0
F92h
F8Dh
F8Ch
TRISA
LATE(1)
LATD(1)
TRISA7
—
LATD7
TRISA6
—
LATD6
TRISA5
—
LATD5
TRISA4
—
LATD4
TRISA3
—
LATD3
TRISA2
LATE2
LATD2
TRISA1
LATE1
LATD1
TRISA0
LATE0
LATD0
F8Bh LATC
LATC7
LATC6
LATC5
LATC4
LATC3
LATC2
LATC1
LATC0
F8Ah LATB
LATB7
LATB6
LATB5
LATB4
LATB3
LATB2
LATB1
LATB0
F89h
F84h
F83h
LATA
PORTE(2)
PORTE(1)
PORTD(1)
LATA7
—
—
RD7
LATA6
—
—
RD6
LATA5
—
—
RD5
LATA4
—
—
RD4
LATA3
RE3
RE3
RD3
LATA2
—
RE2
RD2
LATA1
—
RE1
RD1
LATA0
—
RE0
RD0
F82h
PORTC
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
F81h
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
F80h
PORTA
RA7
RA6
RA5
RA4
RA3
RA2
RA1
RA0
F7Fh
IPR5
—
—
—
—
—
TMR6IP
TMR5IP TMR4IP
F7Eh PIR5
—
—
—
—
—
TMR6IF
TMR5IF TMR4IF
F7Dh PIE5
—
—
—
—
—
TMR6IE
TMR5IE TMR4IE
F7Ch IPR4
—
—
—
—
—
CCP5IP
CCP4IP CCP3IP
F7Bh PIR4
—
—
—
—
—
CCP5IF
CCP4IF CCP3IF
F7Ah PIE4
—
—
—
—
—
CCP5IE
CCP4IE CCP3IE
F79h
CM1CON0
C1ON
C1OUT
C1OE
C1POL
C1SP
C1R
C1CH<1:0>
F78h
CM2CON0
C2ON
C2OUT
C2OE
C2POL
C2SP
C2R
C2CH<1:0>
F77h
CM2CON1
MC1OUT MC2OUT C1RSEL C2RSEL
C1HYS
C2HYS
C1SYNC C2SYNC
F76h
SPBRGH2
EUSART2 Baud Rate Generator, High Byte
F75h
SPBRG2
EUSART2 Baud Rate Generator, Low Byte
F74h
RCREG2
EUSART2 Receive Register
F73h
TXREG2
EUSART2 Transmit Register
F72h
TXSTA2
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
F71h
RCSTA2
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
F70h
BAUDCON2 ABDOVF
RCIDL
DTRXP
CKTXP
BRG16
—
WUE
ABDEN
F6Fh
F6Eh
SSP2BUF
SSP2ADD
SSP2 Receive Buffer/Transmit Register
SSP2 Address Register in I2C Slave Mode. SSP2 Baud Rate Reload Register in I2C Master Mode
F6Dh SSP2STAT
SMP
CKE
D/A
P
S
R/W
UA
BF
F6Ch SSP2CON1
WCOL
SSPOV
SSPEN
CKP
SSPM<3:0>
F6Bh SSP2CON2
GCEN ACKSTAT ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
F6Ah SSP2MSK
SSP1 MASK Register bits
F69h
SSP2CON3 ACKTIM
PCIE
SCIE
BOEN
SDAHT
SBCDE
AHEN
DHEN
Legend:
Note 1:
2:
3:
4:
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
PIC18(L)F4XK22 devices only.
PIC18(L)F2XK22 devices only.
PIC18(L)F23/24K22 and PIC18(L)F43/44K22 devices only.
PIC18(L)F26K22 and PIC18(L)F46K22 devices only.
1111 1111
0000 0000
0000 0000
-111 1111
-000 0000
-000 0000
0000 0000
00xx xxxx
1--- -111
1111 1111
1111 1111
1111 1111
1111 1111
---- -xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- x---
---- x000
0000 0000
0000 00xx
xxx0 0000
xx0x 0000
---- -111
---- -111
---- -000
---- -000
---- -000
---- -000
0000 1000
0000 1000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0010
0000 000x
01x0 0-00
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
1111 1111
0000 0000
DS41412B-page 86
Preliminary
 2010 Microchip Technology Inc.