PIC18F23K22 Datasheet, PDF (329/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

PIC18(L)F2X/4XK22
19.9 Effects of a Reset on CTMU
Upon Reset, all registers of the CTMU are cleared. This
leaves the CTMU module disabled, its current source is
turned off and all configuration options return to their
default settings. The module needs to be re-initialized
following any Reset.
If the CTMU is in the process of taking a measurement at
the time of Reset, the measurement will be lost. A partial
charge may exist on the circuit that was being measured,
and should be properly discharged before the CTMU
makes subsequent attempts to make a measurement.
The circuit is discharged by setting and then clearing the
IDISSEN bit (CTMUCONH<1>) while the A/D Converter
is connected to the appropriate channel.
19.10 Registers
There are three control registers for the CTMU:
• CTMUCONH
• CTMUCONL
• CTMUICON
The CTMUCONH and CTMUCONL registers
(Register 19-1 and Register 19-2) contain control bits
for configuring the CTMU module edge source selec-
tion, edge source polarity selection, edge sequencing,
A/D trigger, analog circuit capacitor discharge and
enables. The CTMUICON register (Register 19-3) has
bits for selecting the current source range and current
source trim.
REGISTER 19-1: CTMUCONH: CTMU CONTROL REGISTER 0
R/W-0
CTMUEN
bit 7
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
CTMUSIDL TGEN
EDGEN EDGSEQEN
R/W-0
IDISSEN
U-0
CTTRIG
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
CTMUEN: CTMU Enable bit
1 = Module is enabled
0 = Module is disabled
bit 6
Unimplemented: Read as ‘0’
bit 5
CTMUSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
bit 4
TGEN: Time Generation Enable bit
1 = Enables edge delay generation
0 = Disables edge delay generation
bit 3
EDGEN: Edge Enable bit
1 = Edges are not blocked
0 = Edges are blocked
bit 2
EDGSEQEN: Edge Sequence Enable bit
1 = Edge 1 event must occur before Edge 2 event can occur
0 = No edge sequence is needed
bit 1
IDISSEN: Analog Current Source Control bit
1 = Analog current source output is grounded
0 = Analog current source output is not grounded
bit 0
CTTRIG: CTMU Special Event Trigger Control Bit
1 = CTMU Special Event Trigger is enabled
0 = CTMU Special Event Trigger is disabled
 2010 Microchip Technology Inc.
Preliminary
DS41412B-page 329