PIC18F23K22 Datasheet, PDF (451/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

PIC18(L)F2X/4XK22
TABLE 27-14: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 1)
Param.
No.
Symbol
Characteristic
Min
Max Units Conditions
71
TscH
71A
SCK Input High Time
(Slave mode)
Continuous
Single Byte
1.25 TCY + 30 —
40
—
72
TscL
72A
SCK Input Low Time
(Slave mode)
Continuous
Single Byte
1.25 TCY + 30 —
40
—
73
TdiV2scH, Setup Time of SDI Data Input to SCK Edge
TdiV2scL
100
—
73A Tb2b
Last Clock Edge of Byte 1 to the 1st Clock Edge 1.5 TCY + 40 —
of Byte 2
74
TscH2diL, Hold Time of SDI Data Input to SCK Edge
TscL2diL
100
—
75
TdoR
SDO Data Output Rise Time
—
25
76
TdoF
SDO Data Output Fall Time
—
25
78
TscR
SCK Output Rise Time
(Master mode)
—
25
79
TscF
SCK Output Fall Time (Master mode)
—
25
80
TscH2doV, SDO Data Output Valid after SCK Edge
TscL2doV
—
50
81
TdoV2scH, SDO Data Output Setup to SCK Edge
TdoV2scL
TCY
—
Note 1: Requires the use of Parameter #73A.
2: Only if Parameter #71A and #72A are used.
ns
ns (Note 1)
ns
ns (Note 1)
ns
ns (Note 2)
ns
ns
ns
ns
ns
ns
ns
FIGURE 27-12: EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
SS
SCK
(CKP = 0)
70
71
72
83
78
79
SCK
(CKP = 1)
80
79
78
SDO
MSb
bit 6 - - - - - -1
LSb
SDI
Note:
MSb In
74
73
75, 76
bit 6 - - - -1
Refer to Figure 27-3 for load conditions.
77
LSb In
 2010 Microchip Technology Inc.
Preliminary
DS41412B-page 451