PIC18F23K22 Datasheet, PDF (33/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

PIC18(L)F2X/4XK22
REGISTER 2-2: OSCCON2: OSCILLATOR CONTROL REGISTER 2
R-0/0
R-0/q
U-0
R/W-0/0
R/W-0/u
R/W-1/1
PLLRDY SOSCRUN
—
MFIOSEL SOSCGO⁽¹⁾ PRISD
bit 7
R-x/u
MFIOFS
R-0/0
LFIOFS
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
q = depends on condition
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
PLLRDY: PLL Run Status bit
1 = System clock comes from 4xPLL
0 = System clock comes from an oscillator, other than 4xPLL
SOSCRUN: SOSC Run Status bit
1 = System clock comes from secondary SOSC
0 = System clock comes from an oscillator, other than SOSC
Unimplemented: Read as ‘0’.
MFIOSEL: MFINTOSC Select bit
1 = MFINTOSC is used in place of HFINTOSC frequencies of 500 kHz, 250 kHz and 31.25 kHz
0 = MFINTOSC is not used
SOSCGO⁽¹⁾: Secondary Oscillator Start Control bit
1 = Secondary oscillator is enabled.
0 = Secondary oscillator is shut off if no other sources are requesting it.
PRISD: Primary Oscillator Drive Circuit Shutdown bit
1 = Oscillator drive circuit on
0 = Oscillator drive circuit off (zero power)
MFIOFS: MFINTOSC Frequency Stable bit
1 = MFINTOSC is stable
0 = MFINTOSC is not stable
LFIOFS: LFINTOSC Frequency Stable bit
1 = LFINTOSC is stable
0 = LFINTOSC is not stable
The SOSCGO bit is only reset on a POR Reset.
 2010 Microchip Technology Inc.
Preliminary
DS41412B-page 33