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PIC18F23K22 Datasheet, PDF (19/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
PIC18(L)F2X/4XK22
TABLE 1-2: PIC18(L)F2XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
PDIP,
SOIC
QFN
Pin Name
Pin Buffer
Type Type
Description
25
26
27
28
11
12
Legend:
Note 1:
2:
22 RB4/IOC0/P1D/T5G/AN11
RB4
I/O TTL Digital I/O.
IOC0
I
TTL Interrupt-on-change pin.
P1D
O CMOS Enhanced CCP1 PWM output.
T5G
I
ST Timer5 external clock gate input.
AN11
I Analog Analog input 11.
23 RB5/IOC1/P2B/P3A/CCP3/T3CKI/T1G/AN13
RB5
I/O TTL Digital I/O.
IOC1
P2B(1)
P3A(1)
CCP3(1)
T3CKI(2)
I
TTL Interrupt-on-change pin.
O CMOS Enhanced CCP2 PWM output.
O CMOS Enhanced CCP3 PWM output.
I/O ST Capture 3 input/Compare 3 output/PWM 3 output.
I
ST Timer3 clock input.
T1G
I
ST Timer1 external clock gate input.
AN13
I Analog Analog input 13.
24 RB6/IOC2/TX2/CK2/PGC
RB6
I/O TTL Digital I/O.
IOC2
I
TTL Interrupt-on-change pin.
TX2
O
— EUSART 2 asynchronous transmit.
CK2
I/O ST EUSART 2 synchronous clock (see related RXx/DTx).
PGC
I/O ST In-Circuit Debugger and ICSP™ programming clock
pin.
25 RB7/IOC3/RX2/DT2/PGD
RB7
I/O TTL Digital I/O.
IOC3
I
TTL Interrupt-on-change pin.
RX2
I
ST EUSART 2 asynchronous receive.
DT2
I/O ST EUSART 2 synchronous data (see related TXx/CKx).
PGD
I/O ST In-Circuit Debugger and ICSP™ programming data
pin.
8 RC0/P2B/T3CKI/T3G/T1CKI/SOSCO
RC0
P2B(2)
T3CKI(1)
I/O TTL Digital I/O.
O CMOS Enhanced CCP1 PWM output.
I
ST Timer3 clock input.
T3G
I
ST Timer3 external clock gate input.
T1CKI
I
ST Timer1 clock input.
SOSCO
O
— Secondary oscillator output.
9 RC1/P2A/CCP2/SOSCI
RC1
I/O TTL Digital I/O.
P2A
CCP2(1)
O CMOS Enhanced CCP2 PWM output.
I/O ST Capture 2 input/Compare 2 output/PWM 2 output.
SOSCI
I Analog Secondary oscillator input.
TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are clear.
 2010 Microchip Technology Inc.
Preliminary
DS41412B-page 19