PIC18F23K22 Datasheet, PDF(24/492 Page) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

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PIC18F23K22 Datasheet, PDF (24/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

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PIC18(L)F2X/4XK22

TABLE 1-3: PIC18(L)F4XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Number

PDIP TQFP QFN

Pin Name

Pin Buffer

Type Type

Description

18 37

37 RC3/SCK1/SCL1/AN15

RC3

I/O

TTL Digital I/O.

SCK1

SCL1

I/O

ST Synchronous serial clock input/output for SPI

mode (MSSP2).

I/O

ST Synchronous serial clock input/output for I2Câ¢

mode (MSSP2).

AN15

I Analog Analog input 15.

23 42

42 RC4/SDI1/SDA1/AN16

RC4

I/O

TTL Digital I/O.

SDI1

SDA1

I

ST SPI data in (MSSP1).

I/O

ST I2Câ¢ data I/O (MSSP1).

AN16

I Analog Analog input 16.

24 43

43 RC5/SDO1/AN17

RC5

I/O

TTL Digital I/O.

SDO1

O

â SPI data out (MSSP1).

AN17

I Analog Analog input 17.

25 44

44 RC6/TX1/CK1/AN18

RC6

I/O

TTL Digital I/O.

TX1

O

â EUSART 1 asynchronous transmit.

CK1

I/O

ST EUSART 1 synchronous clock (see related RXx/

DTx).

AN18

I Analog Analog input 18.

26

1

1 RC7/RX1/DT1/AN19

RC7

I/O

TTL Digital I/O.

RX1

I

ST EUSART 1 asynchronous receive.

DT1

I/O

ST EUSART 1 synchronous data (see related TXx/

CKx).

AN19

I Analog Analog input 19.

19 38

38

RD0/SCK2/SCL2/AN20

RD0

I/O

TTL Digital I/O.

SCK2

SCL2

I/O

ST Synchronous serial clock input/output for SPI

mode (MSSP2).

I/O

ST Synchronous serial clock input/output for I2Câ¢

mode (MSSP2).

AN20

I Analog Analog input 20.

20 39

39 RD1/CCP4/SDI2/SDA2/AN21

RD1

I/O

TTL Digital I/O.

CCP4

I/O

ST Capture 4 input/Compare 4 output/PWM 4 output.

SDI2

SDA2

I

ST SPI data in (MSSP2).

I/O

ST I2Câ¢ data I/O (MSSP2).

AN21

I Analog Analog input 21.

Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;

I = Input; O = Output; P = Power.

Note 1: Default pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX, CCP3MX

and CCP2MX are set.

2: Alternate pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX,

CCP3MX and CCP2MX are clear.

DS41412B-page 24

Preliminary

ï£ 2010 Microchip Technology Inc.

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