PIC18F23K22 Datasheet, PDF(355/492 Page) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

PIC18F23K22 Datasheet, PDF (355/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

◁

PIC18(L)F2X/4XK22

REGISTER 24-5: CONFIG4L: CONFIGURATION REGISTER 4 LOW

R/P-1

R/P-0

U-0

U-0

U-0

R/P-1

DEBUG(2)

XINST

â

â

â

LVP(1)

bit 7

U-0

R/P-1

â

STVREN

bit 0

Legend:

R = Readable bit

P = Programmable bit

-n = Value when device is unprogrammed

U = Unimplemented bit, read as â0â

x = Bit is unknown

bit 7

bit 6

bit 5-3

bit 2

bit 1

bit 0

Note 1:

2:

DEBUG: Background Debugger Enable bit(2)

1 = Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins

0 = Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug

XINST: Extended Instruction Set Enable bit

1 = Instruction set extension and Indexed Addressing mode enabled

0 = Instruction set extension and Indexed Addressing mode disabled (Legacy mode)

Unimplemented: Read as â0â

LVP: Single-Supply ICSP Enable bit

1 = Single-Supply ICSP enabled

0 = Single-Supply ICSP disabled

Unimplemented: Read as â0â

STVREN: Stack Full/Underflow Reset Enable bit

1 = Stack full/underflow will cause Reset

0 = Stack full/underflow will not cause Reset

Can only be changed by a programmer in high-voltage programming mode.

The DEBUG bit is managed automatically by device development tools including debuggers and programmers. For

normal device operations, this bit should be maintained as a â1â.

REGISTER 24-6: CONFIG5L: CONFIGURATION REGISTER 5 LOW

U-0

â

bit 7

U-0

U-0

U-0

R/C-1

R/C-1

R/C-1

R/C-1

â

â

â

CP3(1)

CP2(1)

CP1

CP0

bit 0

Legend:

R = Readable bit

-n = Value when device is unprogrammed

U = Unimplemented bit, read as â0â

C = Clearable only bit

bit 7-4

bit 3

bit 2

bit 1

bit 0

Unimplemented: Read as â0â

CP3: Code Protection bit(1)

1 = Block 3 not code-protected

0 = Block 3 code-protected

CP2: Code Protection bit(1)

1 = Block 2 not code-protected

0 = Block 2 code-protected

CP1: Code Protection bit

1 = Block 1 not code-protected

0 = Block 1 code-protected

CP0: Code Protection bit

1 = Block 0 not code-protected

0 = Block 0 code-protected

Note 1: Available on PIC18(L)FX5K22 and PIC18(L)FX6K22 devices.

ï£ 2010 Microchip Technology Inc.

Preliminary

DS41412B-page 355

▷