PIC18F23K22 Datasheet, PDF (460/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

PIC18(L)F2X/4XK22
TABLE 27-24: A/D CONVERSION REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Max Units
Conditions
130
TAD
A/D Clock Period
0.7 25.0⁽¹⁾ s TOSC based,
-40C to +85C
0.7
4.0⁽¹⁾
s TOSC based,
+85C to +125C
1.0
4.0
s FRC mode, VDD2.0V
131
TCNV Conversion Time
12
(not including acquisition time) (Note 2)
12
TAD
132 TACQ Acquisition Time (Note 3)
1.4
—
s VDD = 3V, Rs = 50
135 TSWC Switching Time from Convert  Sample
— (Note 4)
136
TDIS
Discharge Time
2
2
TAD
Legend:
Note 1:
2:
3:
4:
TBD = To Be Determined
The time of the A/D clock period is dependent on the device frequency and the TAD clock divider.
ADRES register may be read on the following TCY cycle.
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (VDD to VSS or VSS to VDD). The source impedance (RS) on the input channels is 50 .
On the following cycle of the device clock.
DS41412B-page 460
Preliminary
 2010 Microchip Technology Inc.