PIC18F23K22 Datasheet, PDF (481/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

PIC18(L)F2X/4XK22
Operation ................................................................. 318
Operation During Idle Mode ..................................... 328
Operation During Sleep Mode ................................. 328
Customer Change Notification Service ............................ 489
Customer Notification Service .......................................... 489
Customer Support ............................................................ 489
CVREF Voltage Reference Specifications ........................ 439
D
Data Addressing Modes ..................................................... 90
Comparing Addressing Modes with the
Extended Instruction Set Enabled ..................... 93
Direct .......................................................................... 90
Indexed Literal Offset ................................................. 92
Instructions Affected .......................................... 92
Indirect ....................................................................... 90
Inherent and Literal .................................................... 90
Data EEPROM
Code Protection ....................................................... 365
Data EEPROM Memory
Associated Registers ............................................... 109
EEADR and EEADRH Registers ............................. 105
EECON1 and EECON2 Registers ........................... 105
Operation During Code-Protect ............................... 108
Protection Against Spurious Write ........................... 108
Reading .................................................................... 107
Using ........................................................................ 108
Write Verify .............................................................. 107
Writing ...................................................................... 107
Data Memory ..................................................................... 76
Access Bank .............................................................. 82
and the Extended Instruction Set ............................... 92
Bank Select Register (BSR) ....................................... 76
General Purpose Registers ........................................ 82
Map for PIC18F/LF23K22 and PIC18F/LF43K22
Devices ............................................................. 77
Map for PIC18F/LF24K22 and PIC18F/LF44K22
Devices ............................................................. 78
Special Function Registers ........................................ 82
DAW ................................................................................. 386
DC and AC Characteristics
Graphs and Tables .................................................. 461
DC Characteristics
Input/Output ............................................................. 436
Power-Down Current ............................................... 424
Primary Idle Supply Current ..................................... 433
Primary Run Supply Current .................................... 431
RC Idle Supply Current ............................................ 429
RC Run Supply Current ........................................... 427
Secondary Oscillator Supply Current ....................... 434
Supply Voltage ......................................................... 423
DCFSNZ .......................................................................... 387
DECF ............................................................................... 386
DECFSZ ........................................................................... 387
Development Support ...................................................... 417
Device Differences ........................................................... 478
Device Overview
Details on Individual Family Members ....................... 14
Features (table) .......................................................... 15
New Core Features .................................................... 13
Other Special Features .............................................. 14
Device Reset Timers .......................................................... 63
PLL Lock Time-out ..................................................... 63
Power-up Timer (PWRT) ........................................... 63
Time-out Sequence .................................................... 63
DEVID1 Register .............................................................. 358
DEVID2 Register ............................................................. 358
Digital-to-Analog Converter (DAC) .................................. 339
Associated Registers ............................................... 342
Effects of a Reset .................................................... 340
Direct Addressing .............................................................. 91
E
ECCP/CCP. See Enhanced Capture/Compare/PWM
ECCPxAS Register .......................................................... 205
EECON1 Register ...................................................... 97, 106
Effect on Standard PIC Instructions ................................. 414
Effects of Power Managed Modes on Various Clock
Sources ..................................................................... 40
Effects of Reset
PWM mode .............................................................. 186
Electrical Characteristics ................................................. 421
Enhanced Capture/Compare/PWM (ECCP) .................... 177
Enhanced PWM Mode ............................................. 188
Auto-Restart .................................................... 196
Auto-shutdown ................................................ 195
Direction Change in Full-Bridge Output Mode . 194
Full-Bridge Application ..................................... 192
Full-Bridge Mode ............................................. 192
Half-Bridge Application .................................... 191
Half-Bridge Application Examples ................... 197
Half-Bridge Mode ............................................. 191
Output Relationships (Active-High and
Active-Low) .............................................. 189
Output Relationships Diagram ......................... 190
Programmable Dead Band Delay .................... 197
Shoot-through Current ..................................... 197
Start-up Considerations ................................... 199
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) ............................. 263
Errata ................................................................................. 12
EUSART .......................................................................... 263
Asynchronous Mode ................................................ 265
12-bit Break Transmit and Receive ................. 282
Associated Registers, Receive ........................ 271
Associated Registers, Transmit ....................... 267
Auto-Wake-up on Break .................................. 280
Baud Rate Generator (BRG) ........................... 275
Clock Accuracy ................................................ 272
Receiver .......................................................... 268
Setting up 9-bit Mode with Address Detect ..... 270
Transmitter ...................................................... 265
Baud Rate Generator (BRG)
Associated Registers ....................................... 276
Auto Baud Rate Detect .................................... 279
Baud Rate Error, Calculating ........................... 275
Baud Rates, Asynchronous Modes ................. 276
Formulas .......................................................... 275
High Baud Rate Select (BRGH Bit) ................. 275
Clock polarity
Synchronous Mode .......................................... 283
Data polarity
Asynchronous Receive .................................... 268
Asynchronous Transmit ................................... 265
Synchronous Mode .......................................... 283
Interrupts
Asychronous Receive ...................................... 269
Asynchronous Receive .................................... 269
Asynchronous Transmit ................................... 265
Synchronous Master Mode .............................. 283, 288
Associated Registers, Receive ........................ 287
Associated Registers, Transmit ............... 284, 289
 2010 Microchip Technology Inc.
Preliminary
DS41412B-page 481