PIC18F23K22 Datasheet, PDF (155/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

PIC18(L)F2X/4XK22
REGISTER 10-10: LATx: PORTx OUTPUT LATCH REGISTER⁽¹⁾
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
LATx7
LATx6
LATx5
LATx4
LATx3
LATx2
bit 7
R/W-x/u
LATx1
R/W-x/u
LATx0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
LATx<7:0>: PORTx Output Latch bit value⁽²⁾
Note 1: Register Description for LATA, LATB, LATC and LATD.
2: Writes to PORTA are written to corresponding LATA register. Reads from PORTA register is return of I/O
pin values.
REGISTER 10-11: LATE: PORTE OUTPUT LATCH REGISTER⁽¹⁾
U-0
U-0
U-0
U-0
U-0
R/W-x/u
—
—
—
—
—
LATE2
bit 7
R/W-x/u
LATE1
R/W-x/u
LATE0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-3
bit 2-0
Note 1:
2:
Unimplemented: Read as ‘0’
LATE<2:0>: PORTE Output Latch bit value⁽²⁾
Available on PIC18(L)F4XK22 devices only.
Writes to PORTA are written to corresponding LATA register. Reads from PORTA register is return of I/O
pin values.
REGISTER 10-12: WPUB: WEAK PULL-UP PORTB REGISTER
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
WPUB7
WPUB6
WPUB5
WPUB4
WPUB3
bit 7
R/W-1
WPUB2
R/W-1
WPUB1
R/W-1
WPUB0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
WPUB<7:0>: Weak Pull-up Register bits
1 = Pull-up enabled on PORT pin
1 = Pull-up disabled on PORT pin
 2010 Microchip Technology Inc.
Preliminary
DS41412B-page 155