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PIC18F23K22 Datasheet, PDF (200/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
PIC18(L)F2X/4XK22
TABLE 14-13: REGISTERS ASSOCIATED WITH ENHANCED PWM
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ECCP1AS CCP1ASE
CCP1AS<2:0>
P1SSAC<1:0>
P1SSBD<1:0>
CCP1CON
P1M<1:0>
DC1B<1:0>
CCP1M<3:0>
ECCP2AS CCP2ASE
CCP2AS<2:0>
P2SSAC<1:0>
P2SSBD<1:0>
CCP2CON
P2M<1:0>
DC2B<1:0>
CCP2M<3:0>
ECCP3AS CCP3ASE
CCP3AS<2:0>
P3SSAC<1:0>
P3SSBD<1:0>
CCP3CON
P3M<1:0>
DC3B<1:0>
CCP3M<3:0>
CCPTMRS0
C3TSEL<1:0>
—
C2TSEL<1:0>
—
C1TSEL<1:0>
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
IPR1
—
ADIP
RCxIP
TXxIP
SSPIP
CCP1IP TMR2IP TMR1IP
IPR2
OSCFIP
C1IP
C2IP
EEIP
BCL1IP
HLVDIP TMR3IP CCP2IP
IPR4
—
—
—
—
—
CCP5IP
CCP4IP CCP3IP
PIE1
—
ADIE
RCxIE
TXxIE
SSPIE
CCP1IE TMR2IE TMR1IE
PIE2
OSCFIE
C1IE
C2IE
EEIE
BCLIE
HLVDIE TMR3IE CCP2IE
PIE4
—
—
—
—
—
CCP5IE
CCP4IE CCP3IE
PIR1
—
ADIF
RCxIF
TXxIF
SSPIF
CCP1IF
TMR2IF TMR1IF
PIR2
OSCFIF
C1IF
C2IF
EEIF
BCLIF
HLVDIF
TMR3IF CCP2IF
PIR4
—
—
—
—
—
CCP5IF
CCP4IF
CCP3IF
PMD0
UART2MD UART1MD TMR6MD TMR5MD TMR4MD TMR3MD TMR2MD TMR1MD
PMD1
MSSP2MD MSSP1MD
—
CCP5MD CCP4MD CCP3MD CCP2MD CCP1MD
PR2
Timer2 Period Register
PR4
Timer4 Period Register
PR6
Timer6 Period Register
PSTR1CON
—
—
—
STR1SYNC STR1D
STR1C
STR1B
STR1A
PSTR2CON
—
—
—
STR2SYNC STR2D
STR2C
STR2B
STR2A
PSTR3CON
—
—
—
STR3SYNC STR3D
STR3C
STR3B
STR3A
PWM1CON P1RSEN
P1DC<6:0>
PWM2CON P2RSEN
P2DC<6:0>
PWM3CON P3RSEN
P3DC<6:0>
T2CON
—
T2OUTPS<3:0>
TMR2ON
T2CKPS<1:0>
T4CON
—
T4OUTPS<3:0>
TMR4ON
T4CKPS<1:0>
T6CON
—
T6OUTPS<3:0>
TMR6ON
T6CKPS<1:0>
TMR2
Timer2 Module Register
TMR4
Timer4 Module Register
TMR6
Timer6 Module Register
TRISA
TRISA7
TRISA6
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1 TRISA0
TRISB
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1 TRISB0
TRISC
TRISD(1)
TRISE
TRISC7
TRISD7
WPUE3
TRISC6
TRISD6
—
TRISC5
TRISD5
—
TRISC4
TRISD4
—
TRISC3
TRISD3
—
TRISC2
TRISD2
TRISE2(1)
TRISC1
TRISD1
TRISE1(1)
TRISC0
TRISD0
TRISE0(1)
Legend: — = Unimplemented location, read as ‘0’. Shaded bits are not used by Capture mode.
Note 1: These registers/bits are available on PIC18(L)F4XK22 devices.
Register
on Page
205
201
205
201
205
201
204
115
127
128
130
123
124
126
118
119
121
56
57
—
—
—
206
206
206
206
206
206
170
170
170
—
—
—
154
154
154
154
154
DS41412B-page 200
Preliminary
 2010 Microchip Technology Inc.