PIC18F23K22 Datasheet, PDF (142/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

PIC18(L)F2X/4XK22
TABLE 10-7: CONFIGURATION REGISTERS ASSOCIATED WITH PORTB
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
CONFIG3H MCLRE
CONFIG4L DEBUG
—
XINST
P2BMX
—
T3CMX
—
HFOFST
—
CCP3MX PBADEN
LVP⁽¹⁾
—
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTB.
Note 1: Can only be changed when in high voltage programming mode.
Bit 0
CCP2MX
STRVEN
Register
on Page
354
355
10.4 PORTC Registers
PORTC is an 8-bit wide, bidirectional port. The
corresponding data direction register is TRISC. Setting
a TRISC bit (= 1) will make the corresponding PORTC
pin an input (i.e., disable the output driver). Clearing a
TRISC bit (= 0) will make the corresponding PORTC
pin an output (i.e., enable the output driver and put the
contents of the output latch on the selected pin).
The Data Latch register (LATC) is also memory
mapped. Read-modify-write operations on the LATC
register read and write the latched output value for
PORTC.
PORTC is multiplexed with several peripheral functions
(Table 10-8). The pins have Schmitt Trigger input buf-
fers.
Some of these pin functions can be relocated to alter-
nate pins using the Control fuse bits in CONFIG3H.
RC0 is the default pin for T3CKI. Clearing the T3CMX
bit moves the pin function to RB5. RC1 is the default pin
for the CCP2 peripheral pin. Clearing the CCP2MX bit
moves the pin function to the RB3 pin.
Two other pin functions, P2B and CCP3, can be relo-
cated from their default pins to PORTC pins by clearing
the control fuses in CONFIG3H. Clearing P2BMX and
CCP3MX moves the pin functions to RC0 and RC6⁽¹⁾/
RE0⁽²⁾, respectively.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. The
EUSART and MSSP peripherals override the TRIS bit
to make a pin an output or an input, depending on the
peripheral configuration. Refer to the corresponding
peripheral section for additional information.
Note: On a Power-on Reset, these pins are con-
figured as analog inputs.
The contents of the TRISC register are affected by
peripheral overrides. Reading TRISC always returns
the current contents, even though a peripheral device
may be overriding one or more of the pins.
EXAMPLE 10-3: INITIALIZING PORTC
MOVLB
CLRF
CLRF
MOVLW
MOVWF
MOVLW
MOVWF
0xF
PORTC
LATC
0CFh
TRISC
30h
ANSELC
; Set BSR for banked SFRs
; Initialize PORTC by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RC<3:0> as inputs
; RC<5:4> as outputs
; RC<7:6> as inputs
; Value used to
; enable digital inputs
; RC<3:2> dig input enable
; No ANSEL bits for RC<1:0>
; RC<7:6> dig input enable
10.4.1 PORTC OUTPUT PRIORITY
Each PORTC pin is multiplexed with other functions.
The pins, their combined functions and their output
priorities are briefly described here. For additional
information, refer to the appropriate section in this data
sheet.
When multiple outputs are enabled, the actual pin
control goes to the peripheral with the higher priority.
Table 10-4 lists the PORTC pin functions from the
highest to the lowest priority.
Analog input functions, such as ADC, comparator and
SR Latch inputs, are not shown in the priority lists.
These inputs are active when the I/O pin is set for
Analog mode using the ANSELx registers. Digital
output functions may control the pin when it is in Analog
mode with the priority shown below.
DS41412B-page 142
Preliminary
 2010 Microchip Technology Inc.