PIC18F23K22 Datasheet, PDF (257/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

PIC18(L)F2X/4XK22
REGISTER 15-2: SSPxCON1: SSPx CONTROL REGISTER 1 (CONTINUED)
bit 3-0
Note 1:
2:
3:
4:
SSPxM<3:0>: Synchronous Serial Port Mode Select bits
0000 = SPI Master mode, clock = FOSC/4
0001 = SPI Master mode, clock = FOSC/16
0010 = SPI Master mode, clock = FOSC/64
0011 = SPI Master mode, clock = TMR2 output/2
0100 = SPI Slave mode, clock = SCKx pin, SSx pin control enabled
0101 = SPI Slave mode, clock = SCKx pin, SSx pin control disabled, SSx can be used as I/O pin
0110 = I²C Slave mode, 7-bit address
0111 = I²C Slave mode, 10-bit address
1000 = I²C Master mode, clock = FOSC / (4 * (SSPxADD+1))⁽⁴⁾
1001 = Reserved
1010 = SPI Master mode, clock = FOSC/(4 * (SSPxADD+1))
1011 = I²C firmware controlled Master mode (slave idle)
1100 = Reserved
1101 = Reserved
1110 = I²C Slave mode, 7-bit address with Start and Stop bit interrupts enabled
1111 = I²C Slave mode, 10-bit address with Start and Stop bit interrupts enabled
In Master mode, the overflow bit is not set since each new reception (and transmission) is initiated by writing to the
SSPxBUF register.
When enabled, these pins must be properly configured as input or output.
When enabled, the SDAx and SCLx pins must be configured as inputs.
SSPxADD values of 0, 1 or 2 are not supported for I²C Mode.
 2010 Microchip Technology Inc.
Preliminary
DS41412B-page 257