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PIC18F23K22 Datasheet, PDF (304/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
PIC18(L)F2X/4XK22
TABLE 17-2: REGISTERS ASSOCIATED WITH A/D OPERATION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
ADCON0
—
CHS<4:0>
GO/DONE ADON
298
ADCON1
TRIGSEL
—
—
—
PVCFG<1:0>
NVCFG<1:0>
299
ADCON2
ADFM
—
ACQT<2:0>
ADCS<2:0>
300
ADRESH
A/D Result, High Byte
301
ADRESL
A/D Result, Low Byte
301
ANSELA
—
—
ANSA5
—
ANSA3
ANSA2
ANSA1
ANSA0
152
ANSELB
—
—
ANSB5
ANSB4 ANSB3
ANSB2
ANSB1
ANSB0
153
ANSELC
ANSELD(1)
ANSELE(1)
ANSC7
ANSD7
—
ANSC6
ANSD6
—
ANSC5
ANSD5
—
ANSC4
ANSD4
—
ANSC3
ANSD3
—
ANSC2
ANSD2
ANSE2
—
—
153
ANSD1
ANSD0
153
ANSE1
ANSE0
154
CCP5CON
—
—
DC5B<1:0>
CCP5M<3:0>
201
CTMUCONH CTMUEN
—
CTMUSIDL TGEN
EDGEN EDGSEQEN IDISSEN CTTRIG
329
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
115
IPR1
—
ADIP
RC1IP
TX1IP
SSP1IP
CCP1IP
TMR2IP
TMR1IP
127
IPR3
SSP2IP BCL2IP
RC2IP
TX2IP CTMUIP
TMR5GIP
TMR3GIP TMR1GIP 129
IPR4
—
—
—
—
—
CCP5IP
CCP4IP
CCP3IP
130
PIE1
—
ADIE
RC1IE
TX1IE
SSP1IE
CCP1IE
TMR2IE
TMR1IE
123
PIE3
SSP2IE BCL2IE
RC2IE
TX2IE CTMUIE
TMR5GIE
TMR3GIE TMR1GIE 125
PIE4
—
—
—
—
—
CCP5IE
CCP4IE
CCP3IE
126
PIR1
—
ADIF
RC1IF
TX1IF
SSP1IF
CCP1IF
TMR2IF
TMR1IF
118
PIR3
SSP2IF BCL2IF
RC2IF
TX2IF CTMUIF
TMR5GIF
TMR3GIF TMR1GIF 120
PIR4
—
—
—
—
—
CCP5IF
CCP4IF
CCP3IF
121
PMD1
MSSP2MD MSSP1MD
—
CCP5MD CCP4MD
CCP3MD
CCP2MD CCP1MD
57
PMD2
—
—
—
—
CTMUMD CMP2MD
CMP1MD ADCMD
58
TRISA
TRISA7 TRISA6
TRISA5
TRISA4 TRISA3
TRISA2
TRISA1
TRISA0
154
TRISB
TRISB7 TRISB6
TRISB5
TRISB4 TRISB3
TRISB2
TRISB1
TRISB0
154
TRISC
TRISD(1)
TRISE
TRISC7
TRISD7
WPUE3
TRISC6
TRISD6
—
TRISC5
TRISD5
—
TRISC4
TRISD4
—
TRISC3
TRISD3
—
TRISC2
TRISD2
TRISE2(1)
TRISC1
TRISC0
154
TRISD1
TRISD0
154
TRISE1(1) TRISE0(1)
154
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used by this module.
Note 1:
Available on PIC18(L)F4XK22 devices.
TABLE 17-3: CONFIGURATION REGISTERS ASSOCIATED WITH THE ADC MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
CONFIG3H
MCLRE
—
P2BMX
T3CMX HFOFST CCP3MX
PBADEN CCP2MX
354
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used by the ADC module.
DS41412B-page 304
Preliminary
 2010 Microchip Technology Inc.