PIC18F23K22 Datasheet, PDF (21/492 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

PIC18(L)F2X/4XK22
TABLE 1-2: PIC18(L)F2XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
PDIP,
SOIC
QFN
Pin Name
Pin Buffer
Type Type
Description
20
17
VDD
P
— Positive supply for logic and I/O pins.
8, 19 5, 16
VSS
P
— Ground reference for logic and I/O pins.
Legend:
Note 1:
2:
TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are clear.
TABLE 1-3: PIC18(L)F4XK22 PINOUT I/O DESCRIPTIONS
Pin Number
PDIP TQFP QFN
Pin Name
Pin Buffer
Type Type
Description
2
19
19 RA0/C12IN0-/AN0
RA0
I/O
TTL Digital I/O.
C12IN0-
I Analog Comparators C1 and C2 inverting input.
AN0
I Analog Analog input 0.
3
20
20 RA1/C12IN1-/AN1
RA1
I/O
TTL Digital I/O.
C12IN1-
I Analog Comparators C1 and C2 inverting input.
AN1
I Analog Analog input 1.
4
21
21 RA2/C2IN+/AN2/DACOUT/VREF-
RA2
I/O
TTL Digital I/O.
C2IN+
I Analog Comparator C2 non-inverting input.
AN2
I Analog Analog input 2.
DACOUT
O Analog DAC Reference output.
VREF-
I Analog A/D reference voltage (low) input.
5
22
22 RA3/C1IN+/AN3/VREF+
RA3
I/O
TTL Digital I/O.
C1IN+
I Analog Comparator C1 non-inverting input.
AN3
I Analog Analog input 3.
VREF+
I Analog A/D reference voltage (high) input.
6
23
23 RA4/C1OUT/SRQ/T0CKI
RA4
I/O
TTL Digital I/O.
C1OUT
O CMOS Comparator C1 output.
SRQ
O
TTL SR Latch Q output.
T0CKI
I
ST Timer0 external clock input.
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Note 1: Default pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX, CCP3MX
and CCP2MX are set.
2: Alternate pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX,
CCP3MX and CCP2MX are clear.
 2010 Microchip Technology Inc.
Preliminary
DS41412B-page 21