AMD-K6 Datasheet, PDF (90/346 Pages) Advanced Micro Devices – AMD-K6 Processor

AMD-K6^® Processor Data Sheet
Preliminary Information
20695H/0—March 1998
Table 11. Floating-Point Instructions (continued)
Instruction Mnemonic
First Second ModR/M Decode
Byte Byte
Byte
Type
RISC86^®
Opcodes
Note
FUCOMP
DDh
11-101-xxx short float
FUCOMPP
DAh E9h
short float
FXAM
D9h E5h
short float
FXCH
D9h
11-001-xxx short float
FXTRACT
D9h F4h
vector
FYL2X
D9h F1h
short float
FYL2XP1
D9h F9h
short float
FWAIT
9Bh
vector
Note:
* The last three bits of the modR/M byte select the stack entry ST(i).
Table 12. MMX™ Instructions
Instruction Mnemonic
Prefix First ModR/M Decode
Byte(s) Byte Byte
Type
RISC86^®
Opcodes
Note
EMMS
0Fh 77h
vector
MOVD mmreg, mreg32
0Fh 6Eh 11-xxx-xxx short store, mload
*
MOVD mmreg, mem32
0Fh 6Eh mm-xxx-xxx short mload
MOVD mreg32, mmreg
0Fh 7Eh 11-xxx-xxx short mstore, load
*
MOVD mem32, mmreg
0Fh 7Eh mm-xxx-xxx short mstore
MOVQ mmreg1, mmreg2
0Fh 6Fh 11-xxx-xxx short meu
MOVQ mmreg, mem64
0Fh 6Fh mm-xxx-xxx short mload
MOVQ mmreg1, mmreg2
0Fh 7Fh 11-xxx-xxx short meu
MOVQ mem64, mmreg
0Fh 7Fh mm-xxx-xxx short mstore
PACKSSDW mmreg1, mmreg2
0Fh 6Bh 11-xxx-xxx short meu
PACKSSDW mmreg, mem64
0Fh 6Bh mm-xxx-xxx short mload, meu
PACKSSWB mmreg1, mmreg2
0Fh 63h 11-xxx-xxx short meu
PACKSSWB mmreg, mem64
0Fh 64h mm-xxx-xxx short mload, meu
PACKUSWB mmreg1, mmreg2
0Fh 67h 11-xxx-xxx short meu
PACKUSWB mmreg, mem64
0Fh 67h mm-xxx-xxx short mload, meu
PADDB mmreg1, mmreg2
0Fh FCh 11-xxx-xxx short meu
PADDB mmreg, mem64
0Fh FCh mm-xxx-xxx short mload, meu
Note:
* Bits 2, 1, and 0 of the modR/M byte select the integer register.
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Software Environment
Chapter 3