AMD-K6 Datasheet, PDF (25/346 Pages) Advanced Micro Devices – AMD-K6 Processor

20695H/0—March 1998
Preliminary Information
AMD-K6^® Processor Data Sheet
2
Internal Architecture
2.1
Introduction
The AMD-K6 processor implements advanced design techniques
known as the RISC86 microarchitecture. The RISC86
microarchitecture is a decoupled decode/execution design
approach that yields superior sixth-generation performance for
x86-based software. This chapter describes the techniques used
and the functional elements of the RISC86 microarchitecture.
2.2
AMD-K6^® Processor Microarchitecture Overview
When discussing processor design, it is important to understand
the terms architecture, microarchitecture, and design
implementation. The term architecture refers to the instruction
set and features of a processor that are visible to software
p rog ra m s r u n n ing o n t h e p ro c e s so r. The a rchi t ec t ure
determines what software the processor can run. The
architecture of the AMD-K6 processor is the industry-standard
x86 instruction set.
The term microarchitecture refers to the design techniques used
in the processor to reach the target cost, performance, and
functionality goals. The AMD-K6 is based on a sophisticated
RISC core known as the Enhanced RISC86 microarchitecture.
The Enhanced RISC86 microarchitecture is an advanced,
second-order decoupled decode/execution design approach that
enables industry-leading performance for x86-based software.
The term design implementation refers to the actual logic and
circuit designs from which the processor is created according to
the microarchitecture specifications.
Chapter 2
Internal Architecture
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