AMD-K6 Datasheet, PDF (305/346 Pages) Advanced Micro Devices – AMD-K6 Processor

20695H/0—March 1998
Preliminary Information
AMD-K6^® Processor Data Sheet
26 Signal Descriptions
This chapter provides a description of the signals designed to
i n d i c a t e t o s y s t e m l o g i c t h e s p e c i f i e d d u a l -vo l t a g e
re q u ire m e n t s o f t h e A M D -K 6 p ro c e ss o r M o d e l 7 . Fo r
information about the remaining AMD-K6 processor Model 7
signals, see Chapter 5, “Signal Descriptions” on page 79.
26.1
Summary
Driven
VCC2DET (V_CC2 Detect)
Output
VCC2DET is internally tied to V_SS (logic level 0) to indicate to
the system logic that it must supply the specified dual-voltage
requirements to the V_CC2 and V_CC3 pins. The V_CC2 pins supply
voltage to the processor core, independent of the voltage
supplied to the I/O buffers on the V_CC3 pins. Upon sampling
VCC2DET Low, system logic should sample VCC2H/L# to
identify core voltage requirements.
VCC2DET always equals 0 and is never floated—even during
Tri-State Test mode.
26.2
Summary
Driven
VCC2H/L# (V_CC2 High/Low)
Output
VCC2H/L# is internally tied to V_SS (logic level 0) to indicate to
the system logic that it must supply the specified processor core
voltage to the V_CC2 pins. The V_CC2 pins supply voltage to the
processor core, independent of the voltage supplied to the I/O
buffers on the V_CC3 pins. Upon sampling VCC2DET Low to
identify dual-voltage processor requirements, system logic
should sample VCC2H/L# to identify the core voltage
requirements for 2.9 V and 3.2 V products (High) and 2.2 V
products (Low).
VCC2H/L# always equals 0 and is never floated for 2.2 V
products—even during Tri-State Test mode. To ensure proper
Chapter 26
Signal Descriptions
287