AMD-K6 Datasheet, PDF (162/346 Pages) Advanced Micro Devices – AMD-K6 Processor

AMD-K6^® Processor Data Sheet
Preliminary Information
20695H/0—March 1998
AHOLD-Initiated
Inquire Hit to Shared
or Exclusive Line
In Figure 55 on page 145, the processor asserts HIT# and
negates HITM# off the clock edge after the clock edge on which
EADS# is sampled asserted, indicating the current inquire
cycle hits either a shared or exclusive line. (HIT# is driven in
the same state until the next inquire cycle.) The processor
samples INV asserted during the inquire cycle and transitions
the line to the invalid state regardless of its previous state.
During an AHOLD-initiated inquire cycle, the processor
samples AHOLD on every clock edge until it is negated. In
Figure 55, the processor asserts ADS# off the same clock on
which AHOLD is sampled negated. If the inquire cycle hits a
modified line, the processor performs a writeback cycle before
it drives a new bus cycle. The next section describes the
AHOLD-initiated inquire cycle that hits a modified line.
144
Bus Cycles
Chapter 6