AMD-K6 Datasheet, PDF (137/346 Pages) Advanced Micro Devices – AMD-K6 Processor

20695H/0—March 1998
Preliminary Information
AMD-K6^® Processor Data Sheet
Table 18. Bus Cycle Definition
Bus Cycle Initiated
Code Read, Instruction Cache Line Fill
Code Read, Noncacheable
Code Read, Noncacheable
Encoding for Special Cycle
Interrupt Acknowledge
I/O Read
I/O Write
Memory Read, Data Cache Line Fill
Memory Read, Noncacheable
Memory Read, Noncacheable
Memory Write, Data Cache Writeback
Memory Write, Noncacheable
Note:
x means “don’t care”
Generated by Processor
M/IO#
1
1
1
0
0
0
0
1
1
1
1
1
D/C#
0
0
0
0
0
1
1
1
1
1
1
1
W/R#
0
0
0
1
0
0
1
0
0
0
1
1
CACHE#
0
1
x
1
1
1
1
0
1
x
0
1
Generated
by System
KEN#
0
x
1
x
x
x
x
0
x
1
x
x
Table 19. Special Cycles
Special Cycle
Stop Grant
1111110110011x
Flush Acknowledge
(FLUSH# sampled asserted)
0
1
1
1
0
1
1
1
1
0
0
1
1
x
Writeback
(WBINVD instruction)
0111101110011x
Halt
0111110110011x
Flush (INVD, WBINVD
instruction)
0111111010011x
Shutdown
0111111100011x
Note:
x means “don’t care”
Chapter 5
Signal Descriptions
119