AMD-K6 Datasheet, PDF (102/346 Pages) Advanced Micro Devices – AMD-K6 Processor

AMD-K6^® Processor Data Sheet
Preliminary Information
20695H/0—March 1998
5.7
Summary
Driven
APCHK# (Address Parity Check)
Output
If the processor detects an address parity error during an
inquire cycle, APCHK# is asserted for one clock. The processor
does not take an internal exception as the result of detecting an
address bus parity check, and system logic must respond
appropriately to the assertion of this signal.
The processor ensures that APCHK # does not glitch, enabling
the signal to be used as a clocking source for system logic.
APCHK# is driven valid the clock edge after the clock edge on
which the processor samples EADS# asserted. It is negated off
the next clock edge.
APCHK# is always driven except in Tri-State Test mode.
84
Signal Descriptions
Chapter 5