AMD-K6 Datasheet, PDF (63/346 Pages) Advanced Micro Devices – AMD-K6 Processor

20695H/0—March 1998
Preliminary Information
AMD-K6^® Processor Data Sheet
31
12 11 10 9 8 7 6 5 4 3 2 1 0
Physical Page Base Address
A
P P UW
V
DA CW / / P
L
DT SR
Symbol
Description
Bits
AVL
Available to Software
11–9
Reserved
8–7
D
Dirty
6
A
Accessed
5
PCD
Page Cache Disable
4
PWT
Page Writethrough
3
U/S
User/Supervisor
2
W/R
Write/Read
1
P
Present (valid)
0
Figure 39. Page Table Entry (PTE)
Descriptors and Gates
There are various types of structures and registers in the x86
architecture that define, protect, and isolate code segments,
data segments, task state segments, and gates. These structures
are called descriptors.
Figure 40 on page 46 shows the application segment descriptor
format. Table 7 contains information describing the memory
segment type to which the descriptor points. The application
segment descriptor is used to point to either a data or code
segment.
Figure 41 on page 47 shows the system segment descriptor
format. Table 8 contains information describing the type of
segment or gate to which the descriptor points. The system
segment descriptor is used to point to a task state segment, a
call gate, or a local descriptor table.
The AMD-K6 processor uses gates to transfer control between
executable segments with different privilege levels. Figure 42
on page 48 shows the format of the gate descriptor types. Table
8 contains information describing the type of segment or gate
to which the descriptor points.
Chapter 3
Software Environment
45