LAN9420 Datasheet, PDF (95/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
4.2.6 General Purpose Timer Configuration Register (GPT_CFG)
Offset:
00D4h
Size:
32 bits
This register configures the general purpose timer (GPT). The GPT can be configured to generate
interrupts at intervals defined in this register. Refer to Section 3.3.3, "General Purpose Timer (GPT),"
on page 30 for more information on the General Purpose Timer.
BITS
31:30
29
28:16
15:0
DESCRIPTION
RESERVED
General Purpose Timer Enable (TIMER_EN)
When a one is written to this bit the GPT is put into the run state. When
cleared, the GPT is halted. On the 1-to-0 transition of this bit the
GPT_LOAD field will be preset to FFFFh.
RESERVED
General Purpose Timer Pre-Load (GPT_LOAD)
This value is pre-loaded into the GPT. See Section 3.3.3, "General Purpose
Timer (GPT)," on page 30 for more details.
TYPE
RO
R/W
RO
R/W
DEFAULT
-
0b
-
FFFFh
SMSC LAN9420/LAN9420i
95
DATASHEET
Revision 1.6 (07-18-11)